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Software for White Rabbit PTP Core
Commits
773a0042
Commit
773a0042
authored
Mar 18, 2013
by
Grzegorz Daniluk
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Merge branch 'minic_fix'
parents
7a73c072
64da3a91
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2 changed files
with
24 additions
and
13 deletions
+24
-13
minic.c
dev/minic.c
+20
-12
minic_regs.h
include/hw/minic_regs.h
+4
-1
No files found.
dev/minic.c
View file @
773a0042
...
...
@@ -320,25 +320,33 @@ int minic_tx_frame(uint8_t * hdr, uint8_t * payload, uint32_t size,
mcr
=
minic_readl
(
MINIC_REG_MCR
);
minic_writel
(
MINIC_REG_MCR
,
mcr
|
MINIC_MCR_TX_START
);
i
=
0
;
do
{
/* wait for the DMA to finish */
for
(
i
=
0
;
i
<
1000
;
++
i
)
{
mcr
=
minic_readl
(
MINIC_REG_MCR
);
if
(
i
>
0
)
if
(
(
mcr
&
MINIC_MCR_TX_IDLE
)
!=
0
)
break
;
timer_delay
(
1
);
i
++
;
}
while
(((
mcr
&
MINIC_MCR_TX_IDLE
)
==
0
)
&&
(
i
<
1000
));
}
if
(
i
==
1000
)
mprintf
(
"Warning: tx not terminated infinite mcr=0x%x
\n
"
,
mcr
);
if
(
hwts
)
{
/* wait for the timestamp */
if
(
hwts
)
{
uint32_t
raw_ts
;
uint16_t
fid
;
uint32_t
counter_r
,
counter_f
;
uint64_t
sec
;
uint32_t
nsec
;
/* wait for the timestamp */
for
(
i
=
0
;
i
<
1000
;
++
i
)
{
mcr
=
minic_readl
(
MINIC_REG_MCR
);
if
((
mcr
&
MINIC_MCR_TX_TS_READY
)
!=
0
)
break
;
timer_delay
(
1
);
}
if
(
i
==
1000
)
mprintf
(
"Warning: tx timestamp never became available
\n
"
);
ts_valid
=
(
uint8_t
)(
minic_readl
(
MINIC_REG_TSR0
)
&
MINIC_TSR0_VALID
);
...
...
@@ -360,11 +368,11 @@ int minic_tx_frame(uint8_t * hdr, uint8_t * payload, uint32_t size,
hwts
->
sec
=
sec
;
hwts
->
ahead
=
0
;
hwts
->
nsec
=
counter_r
*
8
;
// TRACE_DEV("minic_tx_frame [%d bytes] TS: %d.%d valid %d\n", size, hwts->utc, hwts->nsec, hwts->valid);
minic
.
tx_count
++
;
}
}
return
size
;
}
...
...
include/hw/minic_regs.h
View file @
773a0042
...
...
@@ -3,7 +3,7 @@
* File : minic_regs.h
* Author : auto-generated by wbgen2 from mini_nic.wb
* Created : T
ue May 29 15:57:15 2012
* Created : T
hu Mar 7 14:45:52 2013
* Standard : ANSI C
THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE mini_nic.wb
...
...
@@ -51,6 +51,9 @@
/* definitions for field: RX DMA enable in reg: miNIC Control Register */
#define MINIC_MCR_RX_EN WBGEN2_GEN_MASK(10, 1)
/* definitions for field: TX TS ready in reg: miNIC Control Register */
#define MINIC_MCR_TX_TS_READY WBGEN2_GEN_MASK(11, 1)
/* definitions for field: RX Accepted Packet Classes in reg: miNIC Control Register */
#define MINIC_MCR_RX_CLASS_MASK WBGEN2_GEN_MASK(16, 8)
#define MINIC_MCR_RX_CLASS_SHIFT 16
...
...
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