Support aligning the PPS out to PPS input when WRSFL works as GM.

1. Add new variable ext_pps_latency_ps in struct spll_stats, using it to get the ext_pps_latency parameter from ARM(linux). 2. Change SPLL_STATS_VER to 4, modify the related function. 3. Modify the Main PLL phase shift in GM mode according to ext_pps_lat- ency_ps. Calibration are needed if you want to align the PPS out to PPS in.

Support aligning the PPS out to PPS input when WRSFL works as GM.
1. Add new variable ext_pps_latency_ps in struct spll_stats, using it to get the ext_pps_latency parameter from ARM(linux). 2. Change SPLL_STATS_VER to 4, modify the related function. 3. Modify the Main PLL phase shift in GM mode according to ext_pps_lat- ency_ps. Calibration are needed if you want to align the PPS out to PPS in.
429c2ef5 · li hongming · ca1fc6bf · 429c2ef5 · 429c2ef5 · 429c2ef5
Commit 429c2ef5 authored Oct 19, 2018 by li hongming
8 changed files
--- a/Makefile
+++ b/Makefile
@@ -114,7 +114,7 @@ sdb-lib/libsdbfs.a:
 	$(MAKE) -C sdb-lib

 $(OUTPUT).elf: $(LDS-y) $(AUTOCONF) gitmodules $(OUTPUT).o config.o
-	$(CC) $(CFLAGS) -D__GIT_VER__="\"$(GIT_VER)\"" -c revision.c
+	$(CC) $(CFLAGS) -D__GIT_VER__="\"$(GIT_VER)\"" -D__GIT_USR__="\"$(GIT_USR)\"" -c revision.c
 	${CC} -o $@ revision.o config.o $(OUTPUT).o $(LDFLAGS)
 	${OBJDUMP} -d $(OUTPUT).elf > $(OUTPUT)_disasm.S
 	$(SIZE) $@

--- a/include/revision.h
+++ b/include/revision.h
@@ -4,5 +4,6 @@
 extern const char *build_revision;
 extern const char *build_date;
 extern const char *build_time;
+extern const char *build_by;

 #endif /* __REVISION_H__ */
--- a/revision.c
+++ b/revision.c
@@ -4,6 +4,8 @@ const char *build_revision = stats.commit_id;

 const char *build_date = stats.build_date;
 const char *build_time = stats.build_time;
+const char *build_by = stats.build_by;
+
 /*
 * We export softpll internal status to the ARM cpu, for SNMP. Thus,
 * we place this structure at a known address in the linker script
@@ -16,6 +18,7 @@ struct spll_stats stats __attribute__((section(".stats"))) = {
 #else
 	.build_date = __DATE__,
 	.build_time = __TIME__,
+	.build_by = __GIT_USR__,
 #endif
 	.commit_id = __GIT_VER__,
 };
--- a/shell/cmd_version.c
+++ b/shell/cmd_version.c
@@ -14,7 +14,7 @@ static int cmd_ver(const char *args[])
 	int hwram = sysc_get_memsize();

 	pp_printf("WR Core build: %s%s\n", build_revision, SUPPORT);
-	pp_printf("Built: %s %s\n", build_date, build_time); /* may be empty */
+	pp_printf("Built: %s %s by %s\n", build_date, build_time, build_by); /* may be empty */
 	pp_printf("Built for %d kB RAM, stack is %d bytes\n",
 		  CONFIG_RAMSIZE / 1024, CONFIG_STACKSIZE);
 	/* hardware reports memory size, with a 16kB granularity */

--- a/softpll/softpll_ng.h
+++ b/softpll/softpll_ng.h
@@ -130,7 +130,7 @@ int spll_get_dac(int out_channel);

 void check_vco_frequencies();

-#define SPLL_STATS_VER 2
+#define SPLL_STATS_VER 4

 /* info reported through .stat section */
 /* due to endiannes problem strings has to be 4 bytes alligned */
@@ -150,6 +150,9 @@ struct spll_stats {
 	char commit_id[32];
 	char build_date[16];
 	char build_time[16];
+	char build_by[32];
+
+	int ext_pps_latency_ps; // added by hm
 };

 /* This only exists in wr-switch, but we should use it always */

--- a/softpll/spll_external.c
+++ b/softpll/spll_external.c
@@ -12,7 +12,7 @@

 #include "spll_external.h"
 #include "spll_debug.h"
-
+#include "softpll_ng.h"
 #include <pp-printf.h>
 #include "trace.h"
 #include "irq.h"
@@ -32,7 +32,7 @@

 #define EXT_PERIOD_NS 100
 #define EXT_FREQ_HZ 10000000
-#define EXT_PPS_LATENCY_PS 13980 // fixme: make configurable, change for WRSFL
+//#define EXT_PPS_LATENCY_PS 13980 // fixme: make configurable, change for WRSFL

 void external_init(volatile struct spll_external_state *s, int ext_ref,
 			  int realign_clocks)
@@ -158,7 +158,7 @@ void external_align_fsm(volatile struct spll_external_state *s)
 					s->align_shift += s->align_step;
 					mpll_set_phase_shift(s->main, s->align_shift);
 				} else if (v == s->align_target) {
-					s->align_shift += EXT_PPS_LATENCY_PS;
+					s->align_shift += stats.ext_pps_latency_ps;
 					mpll_set_phase_shift(s->main, s->align_shift);
 					s->align_state = ALIGN_STATE_COMPENSATE_DELAY;
 				}

--- a/softpll/spll_external.h
+++ b/softpll/spll_external.h
@@ -21,13 +21,13 @@ struct spll_external_state {
 	struct spll_helper_state *helper;
 	struct spll_main_state *main;

-  int enabled;
+	int enabled;

 	int align_state;
 	int align_timer;
-  int align_target;
-  int align_step;
-  int align_shift;
+	int align_target;
+	int align_step;
+	int align_shift;
 };

 void external_init(volatile struct spll_external_state *s, int ext_ref,

--- a/wrs_main.c
+++ b/wrs_main.c
@@ -27,8 +27,8 @@ int main(void)
 	uart_init_hw();
 	TRACE("\n");
 	TRACE("WR Switch Real Time Subsystem (c) CERN 2011 - 2014\n");
-	TRACE("Revision: %s, built: %s %s.\n",
-	      build_revision, build_date, build_time);
+	TRACE("Revision: %s, built: %s %s by %s.\n",
+	      build_revision, build_date, build_time, build_by);
 	TRACE("SCB version: %d. %s\n", scb_ver,(scb_ver>=34)?"10 MHz SMC Output.":"" );
 	TRACE("Start counter %d\n", stats.start_cnt);
 	TRACE("--\n");