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Software for White Rabbit PTP Core
Commit 426fccf2 authored by Grzegorz Daniluk's avatar Grzegorz Daniluk
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bsp/generic: add some comments, no technical change

parent 76e0d3e4
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boards/generic/board.c
View file @ 426fccf2
......@@ -14,18 +14,38 @@ int wrc_board_init()
int memtype;
uint32_t sdbfs_addr;
uint32_t sector_size;
/*
* declare GPIO pins and configure their directions for bit-banging SPI
* limit SPI speed to 10MHz by setting bit_delay = CPU_CLOCK / 10^6
*/
bb_spi_create( &spi_wrc_flash,
&pin_sysc_spi_ncs,
&pin_sysc_spi_mosi,
&pin_sysc_spi_miso,
&pin_sysc_spi_sclk, 10 );
&pin_sysc_spi_sclk, CPU_CLOCK / 10000000 );
spi_wrc_flash.rd_falling_edge = 1;
/*
* Read from gateware info about used memory. Currently only base
* address and sector size for memtype flash is supported.
*/
get_storage_info(&memtype, &sdbfs_addr, &sector_size);
/*
* Initialize SPI flash and read its ID
*/
spi_flash_create( &wrc_flash_dev, &spi_wrc_flash, sector_size);
/*
* Initialize storage subsystem with newly created SPI Flash
*/
storage_spiflash_create( &wrc_storage_dev, &wrc_flash_dev );
/*
* Mount SDBFS filesystem from storage.
*/
storage_mount( &wrc_storage_dev );
return 0;
}
......
dev/bb_spi.c
View file @ 426fccf2
......@@ -145,6 +145,12 @@ void bb_spi_xfer(struct spi_bus *bus, uint64_t din, uint64_t *d_out, int n_bits)
}
/*
* Declare GPIOs for bitbanging SPI
* set initial state of outputs
* set SPI speed by configuring bit delay
*/
int bb_spi_create( struct spi_bus *bus,
struct gpio_pin *pin_cs,
struct gpio_pin *pin_mosi,
......
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