Commit 3de5e8d5 authored by Tristan Gingold's avatar Tristan Gingold

softpll_ng: fix build for FRAC_SPLL

parent 9bad0139
Pipeline #5057 passed with stage
in 3 minutes and 38 seconds
......@@ -435,7 +435,6 @@ int spll_start_channel(int channel)
m->div_cnt = 0;
m->div_ref = a->div_ref;
m->div_fb = a->div_fb;
m->frequency_lock_threshold = 100; // HACK: make this programmable (we need higher threshold for the main VCO than for the AUXes, esp. silabs)
#endif
mpll_start(m);
......
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