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Software for White Rabbit PTP Core
Commit 30358b43 authored by li hongming's avatar li hongming
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Low jitter function for WRSFL. 

    Add external AD9516 configuration. (VCXO is 25MHz)
    Modify softpll_ng according to the external AD9516.
    Bug: snmpd reports the wrong softPLL state.
parent d2a9c4fd
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dev/ad9516.c
View file @ 30358b43
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dev/ad9516_config.h
View file @ 30358b43
...@@ -78,7 +78,7 @@ const struct ad9516_reg ad9516_base_config_34[] = { ...@@ -78,7 +78,7 @@ const struct ad9516_reg ad9516_base_config_34[] = {
{0x0003, 0xC3}, {0x0003, 0xC3},
{0x0004, 0x00}, {0x0004, 0x00},
{0x0010, 0x7C}, {0x0010, 0x7C},
{0x0011, 0x04}, {0x0011, 0x05},
{0x0012, 0x00}, {0x0012, 0x00},
{0x0013, 0x0C}, {0x0013, 0x0C},
{0x0014, 0x12}, {0x0014, 0x12},
...@@ -143,7 +143,26 @@ const struct ad9516_reg ad9516_base_config_34[] = { ...@@ -143,7 +143,26 @@ const struct ad9516_reg ad9516_base_config_34[] = {
{0x0231, 0x00}, {0x0231, 0x00},
}; };
/* Config for 25 MHz VCTCXO reference (RDiv = 5, use REF1) */
const struct ad9516_reg ad9516_ref_tcxo[] = {
{0x0011, 0x05},
{0x0012, 0x00}, /* RDiv = 5 */
{0x001C, 0x06} /* Use REF1 */
};
/* Config for 20 MHz VCTCXO reference (RDiv = 0, use REF1) */
//const struct ad9516_reg ad9516_ref_tcxo[] = {
//{0x0011, 0x04},
//{0x0012, 0x00}, /* RDiv = 4 */
//{0x001C, 0x06} /* Use REF1 */
//};
/* Config for 10 MHz external reference (RDiv = 2, use REF2) */
const struct ad9516_reg ad9516_ref_ext[] = {
{0x0011, 0x02},
{0x0012, 0x00}, /* RDiv = 2 */
{0x001C, 0x46} /* Use REF1 */
};
/* Configuration for the SCB version greater than or equal 3.4: Base + 6, 7, 8, 9 outputs*/ /* Configuration for the SCB version greater than or equal 3.4: Base + 6, 7, 8, 9 outputs*/
const struct ad9516_reg ad9516_ext_base_config[] = { const struct ad9516_reg ad9516_ext_base_config[] = {
...@@ -216,19 +235,4 @@ const struct ad9516_reg ad9516_ext_base_config[] = { ...@@ -216,19 +235,4 @@ const struct ad9516_reg ad9516_ext_base_config[] = {
{0x01E1, 0x02}, {0x01E1, 0x02},
{0x0230, 0x00}, {0x0230, 0x00},
{0x0231, 0x00}, {0x0231, 0x00},
}; };
\ No newline at end of file
/* Config for 25 MHz VCTCXO reference (RDiv = 5, use REF1) */
const struct ad9516_reg ad9516_ref_tcxo[] = {
{0x0011, 0x04},
{0x0012, 0x00}, /* RDiv = 4 */
{0x001C, 0x06} /* Use REF1 */
};
/* Config for 10 MHz external reference (RDiv = 2, use REF2) */
const struct ad9516_reg ad9516_ref_ext[] = {
{0x0011, 0x02},
{0x0012, 0x00}, /* RDiv = 2 */
{0x001C, 0x46} /* Use REF1 */
};
include/ext-board.h deleted 100644 → 0
View file @ d2a9c4fd
#ifndef __EXT_BOARD_H
#define __EXT_BOARD_H
#define GPIO_EXT_PLL_RESET_N 4
#define GPIO_EXT_BOARD_DETECT 5
#define GPIO_EXT_OSC_FRED_D2 8
#define GPIO_EXT_OSC_FRED_D1 7
#define GPIO_EXT_OSC_FRED_D0 6
#endif
\ No newline at end of file
include/gpio-wrs.h
View file @ 30358b43
...@@ -10,8 +10,6 @@ ...@@ -10,8 +10,6 @@
#include "board.h" #include "board.h"
struct GPIO_WB struct GPIO_WB
{ {
uint32_t CODR; /*Clear output register*/ uint32_t CODR; /*Clear output register*/
......
softpll/softpll_ng.c
View file @ 30358b43
...@@ -298,7 +298,6 @@ void spll_init(int mode, int slave_ref_channel, int align_pps) ...@@ -298,7 +298,6 @@ void spll_init(int mode, int slave_ref_channel, int align_pps)
PPSG->ESCR = 0; PPSG->ESCR = 0;
PPSG->CR = PPSG_CR_CNT_EN | PPSG_CR_PWIDTH_W(PPS_WIDTH); PPSG->CR = PPSG_CR_CNT_EN | PPSG_CR_PWIDTH_W(PPS_WIDTH);
if(mode == SPLL_MODE_DISABLED) if(mode == SPLL_MODE_DISABLED)
s->seq_state = SEQ_DISABLED; s->seq_state = SEQ_DISABLED;
else else
...@@ -463,12 +462,12 @@ void spll_show_stats() ...@@ -463,12 +462,12 @@ void spll_show_stats()
if (softpll.mode > 0) if (softpll.mode > 0)
pp_printf("softpll: irqs %d seq %s mode %d " pp_printf("softpll: irqs %d seq %s mode %d "
"alignment_state %d HL%d ML%d HY=%d MY=%d DelCnt=%d setpoint:%d\n", "alignment_state %d HL%d ML%d HY=%d MY=%d DelCnt=%d\n",
s->irq_count, stringlist_lookup(seq_states, s->seq_state), s->irq_count, stringlist_lookup(seq_states, s->seq_state),
s->mode, s->ext.align_state, s->mode, s->ext.align_state,
s->helper.ld.locked, s->mpll.ld.locked, s->helper.ld.locked, s->mpll.ld.locked,
s->helper.pi.y, s->mpll.pi.y, s->helper.pi.y, s->mpll.pi.y,
s->delock_count, s->mpll.phase_shift_current); s->delock_count);
} }
int spll_shifter_busy(int channel) int spll_shifter_busy(int channel)
...@@ -639,11 +638,10 @@ int spll_update() ...@@ -639,11 +638,10 @@ int spll_update()
stats.del_cnt = softpll.delock_count; stats.del_cnt = softpll.delock_count;
stats.sequence++; stats.sequence++;
return ret != 0; return ret != 0;
} }
int spll_measure_frequency(int osc) static int spll_measure_frequency(int osc)
{ {
volatile uint32_t *reg; volatile uint32_t *reg;
...@@ -661,7 +659,7 @@ int spll_measure_frequency(int osc) ...@@ -661,7 +659,7 @@ int spll_measure_frequency(int osc)
return 0; return 0;
} }
// timer_delay_ms(2000); timer_delay_ms(2000);
return (*reg ) & (0xfffffff); return (*reg ) & (0xfffffff);
} }
...@@ -693,24 +691,23 @@ static int calc_apr(int meas_min, int meas_max, int f_center ) ...@@ -693,24 +691,23 @@ static int calc_apr(int meas_min, int meas_max, int f_center )
void check_vco_frequencies() void check_vco_frequencies()
{ {
//disable_irq(); disable_irq();
int f_min, f_max; int f_min, f_max;
pll_verbose("SoftPLL VCO Frequency/APR test:\n"); pll_verbose("SoftPLL VCO Frequency/APR test:\n");
// spll_set_dac(-1, 0); spll_set_dac(-1, 0);
f_min = spll_measure_frequency(SPLL_OSC_DMTD); f_min = spll_measure_frequency(SPLL_OSC_DMTD);
// spll_set_dac(-1, 65535); spll_set_dac(-1, 65535);
f_max = spll_measure_frequency(SPLL_OSC_DMTD); f_max = spll_measure_frequency(SPLL_OSC_DMTD);
pll_verbose("DMTD VCO: Low=%d Hz Hi=%d Hz, APR = %d ppm.\n", f_min, f_max, calc_apr(f_min, f_max, 62500000)); pll_verbose("DMTD VCO: Low=%d Hz Hi=%d Hz, APR = %d ppm.\n", f_min, f_max, calc_apr(f_min, f_max, 62500000));
// spll_set_dac(0, 0); spll_set_dac(0, 0);
f_min = spll_measure_frequency(SPLL_OSC_REF); f_min = spll_measure_frequency(SPLL_OSC_REF);
// spll_set_dac(0, 65535); spll_set_dac(0, 65535);
f_max = spll_measure_frequency(SPLL_OSC_REF); f_max = spll_measure_frequency(SPLL_OSC_REF);
pll_verbose("REF VCO: Low=%d Hz Hi=%d Hz, APR = %d ppm.\n", f_min, f_max, calc_apr(f_min, f_max, REF_CLOCK_FREQ_HZ)); pll_verbose("REF VCO: Low=%d Hz Hi=%d Hz, APR = %d ppm.\n", f_min, f_max, calc_apr(f_min, f_max, REF_CLOCK_FREQ_HZ));
f_min = spll_measure_frequency(SPLL_OSC_EXT); f_min = spll_measure_frequency(SPLL_OSC_EXT);
pll_verbose("EXT clock: Freq=%d Hz\n", f_min); pll_verbose("EXT clock: Freq=%d Hz\n", f_min);
} }
softpll/spll_external.c
View file @ 30358b43
...@@ -14,7 +14,6 @@ ...@@ -14,7 +14,6 @@
#include "softpll_ng.h" #include "softpll_ng.h"
#include "irq.h" #include "irq.h"
#include "gpio-wrs.h" #include "gpio-wrs.h"
#include "ext-board.h"
#define ALIGN_SAMPLE_PERIOD 100000 #define ALIGN_SAMPLE_PERIOD 100000
#define ALIGN_TARGET 0 #define ALIGN_TARGET 0
...@@ -29,8 +28,6 @@ void external_init(volatile struct spll_external_state *s, int ext_ref, ...@@ -29,8 +28,6 @@ void external_init(volatile struct spll_external_state *s, int ext_ref,
{ {
int idx = spll_n_chan_ref + spll_n_chan_out; int idx = spll_n_chan_ref + spll_n_chan_out;
if (gpio_in(GPIO_EXT_BOARD_DETECT))
idx++;
helper_init(s->helper, idx); helper_init(s->helper, idx);
mpll_init(s->main, idx, spll_n_chan_ref); mpll_init(s->main, idx, spll_n_chan_ref);
...@@ -42,7 +39,7 @@ void external_init(volatile struct spll_external_state *s, int ext_ref, ...@@ -42,7 +39,7 @@ void external_init(volatile struct spll_external_state *s, int ext_ref,
void external_start(struct spll_external_state *s) void external_start(struct spll_external_state *s)
{ {
helper_start(s->helper); helper_start(s->helper);
SPLL->ECCR = SPLL_ECCR_EXT_EN; SPLL->ECCR = SPLL_ECCR_EXT_EN;
s->align_state = ALIGN_STATE_WAIT_CLKIN; s->align_state = ALIGN_STATE_WAIT_CLKIN;
...@@ -52,17 +49,11 @@ void external_start(struct spll_external_state *s) ...@@ -52,17 +49,11 @@ void external_start(struct spll_external_state *s)
int external_locked(volatile struct spll_external_state *s) int external_locked(volatile struct spll_external_state *s)
{ {
if (!s->helper->ld.locked || !s->main->ld.locked) if (!s->helper->ld.locked || !s->main->ld.locked ||
return 0; !(SPLL->ECCR & SPLL_ECCR_EXT_REF_LOCKED) || // ext PLL became unlocked
(SPLL->ECCR & SPLL_ECCR_EXT_REF_STOPPED)) // 10MHz unplugged (only SPEC)
if (!gpio_in(GPIO_EXT_BOARD_DETECT) && (!(SPLL->ECCR & SPLL_ECCR_EXT_REF_LOCKED) || // ext PLL became unlocked
(SPLL->ECCR & SPLL_ECCR_EXT_REF_STOPPED))) // 10MHz unplugged (only SPEC)
return 0; return 0;
//FIXME A bug prevents the correct locking if the external lock check is executed
// Correct way to solve it: export the LOCK signal from the gateware and check it
// if (gpio_in(GPIO_EXT_BOARD_DETECT) && ext_ad9516_locked())
// return 1;
switch(s->align_state) { switch(s->align_state) {
case ALIGN_STATE_EXT_OFF: case ALIGN_STATE_EXT_OFF:
case ALIGN_STATE_WAIT_CLKIN: case ALIGN_STATE_WAIT_CLKIN:
...@@ -95,34 +86,33 @@ static int align_sample(int channel, int *v) ...@@ -95,34 +86,33 @@ static int align_sample(int channel, int *v)
int external_align_fsm(volatile struct spll_external_state *s) int external_align_fsm(volatile struct spll_external_state *s)
{ {
int v, done_sth = 0; int v, done_sth = 0;
uint32_t f_ext = 0;
switch(s->align_state) { switch(s->align_state) {
case ALIGN_STATE_EXT_OFF: case ALIGN_STATE_EXT_OFF:
break; break;
case ALIGN_STATE_WAIT_CLKIN: case ALIGN_STATE_WAIT_CLKIN:
if(!gpio_in(GPIO_EXT_BOARD_DETECT) && !(SPLL->ECCR & SPLL_ECCR_EXT_REF_STOPPED) ) { if (!ext_ad9516_init()) {
SPLL->ECCR |= SPLL_ECCR_EXT_REF_PLLRST; SPLL->ECCR |= SPLL_ECCR_EXT_REF_PLLRST;
s->align_state = ALIGN_STATE_WAIT_PLOCK; s->align_state = ALIGN_STATE_WAIT_PLOCK;
done_sth++; done_sth++;
} }
f_ext = spll_measure_frequency(SPLL_OSC_EXT); // if( !(SPLL->ECCR & SPLL_ECCR_EXT_REF_STOPPED) ) {
if (gpio_in(GPIO_EXT_BOARD_DETECT) && (f_ext > 9999000) && (f_ext < 10001000)) // SPLL->ECCR |= SPLL_ECCR_EXT_REF_PLLRST;
if (!ext_ad9516_init()) { // s->align_state = ALIGN_STATE_WAIT_PLOCK;
s->align_state = ALIGN_STATE_WAIT_PLOCK; // done_sth++;
pp_printf("External AD9516 locked\n"); // }
}
break; break;
case ALIGN_STATE_WAIT_PLOCK: case ALIGN_STATE_WAIT_PLOCK:
SPLL->ECCR &= (~SPLL_ECCR_EXT_REF_PLLRST); SPLL->ECCR &= (~SPLL_ECCR_EXT_REF_PLLRST);
if(!gpio_in(GPIO_EXT_BOARD_DETECT) && SPLL->ECCR & SPLL_ECCR_EXT_REF_STOPPED ) if( SPLL->ECCR & SPLL_ECCR_EXT_REF_STOPPED )
s->align_state = ALIGN_STATE_WAIT_CLKIN; s->align_state = ALIGN_STATE_WAIT_CLKIN;
else if((!gpio_in(GPIO_EXT_BOARD_DETECT) && SPLL->ECCR & SPLL_ECCR_EXT_REF_LOCKED ) || // else if( SPLL->ECCR & SPLL_ECCR_EXT_REF_LOCKED )
gpio_in(GPIO_EXT_BOARD_DETECT) && ext_ad9516_locked()) else if(ext_ad9516_locked()) {
pp_printf("External AD9516 locked\n");
s->align_state = ALIGN_STATE_START; s->align_state = ALIGN_STATE_START;
}
done_sth++; done_sth++;
break; break;
...@@ -163,9 +153,6 @@ int external_align_fsm(volatile struct spll_external_state *s) ...@@ -163,9 +153,6 @@ int external_align_fsm(volatile struct spll_external_state *s)
s->align_shift = 0; s->align_shift = 0;
pll_verbose("EXT: CSync complete.\n"); pll_verbose("EXT: CSync complete.\n");
done_sth++; done_sth++;
//REMOVE
//mpll_set_phase_shift(s->main, +9000);
//s->align_state = ALIGN_STATE_COMPENSATE_DELAY;
} }
break; break;
......
softpll/spll_main.c
View file @ 30358b43
...@@ -29,8 +29,8 @@ void mpll_init(struct spll_main_state *s, int id_ref, ...@@ -29,8 +29,8 @@ void mpll_init(struct spll_main_state *s, int id_ref,
s->pi.anti_windup = 1; s->pi.anti_windup = 1;
s->pi.bias = 30000; s->pi.bias = 30000;
#if defined(CONFIG_WR_SWITCH) #if defined(CONFIG_WR_SWITCH)
s->pi.kp = 2000; // / 2; s->pi.kp = 1100; // / 2;
s->pi.ki = 15; // / 2; s->pi.ki = 30; // / 2;
#elif defined(CONFIG_WR_NODE) #elif defined(CONFIG_WR_NODE)
s->pi.kp = -1100; // / 2; s->pi.kp = -1100; // / 2;
s->pi.ki = -30; // / 2; s->pi.ki = -30; // / 2;
......
wrs_main.c
View file @ 30358b43
...@@ -13,8 +13,6 @@ ...@@ -13,8 +13,6 @@
#include "minipc.h" #include "minipc.h"
#include "revision.h" #include "revision.h"
#include "system_checks.h" #include "system_checks.h"
#include "gpio-wrs.h"
#include "ext-board.h"
int scb_ver = 33; /* SCB version */ int scb_ver = 33; /* SCB version */
...@@ -42,8 +40,6 @@ int main(void) ...@@ -42,8 +40,6 @@ int main(void)
build_revision, build_date, build_time); build_revision, build_date, build_time);
pp_printf("SCB version: %d. %s\n", scb_ver,(scb_ver>=34)?"10 MHz SMC Output.":"" ); pp_printf("SCB version: %d. %s\n", scb_ver,(scb_ver>=34)?"10 MHz SMC Output.":"" );
pp_printf("Start counter %d\n", stats.start_cnt); pp_printf("Start counter %d\n", stats.start_cnt);
if (gpio_in(GPIO_EXT_BOARD_DETECT))
pp_printf("\n--- WRS Low jitter board detected. ---\nAllow 1 hour of warming up before starting measurements\n");
pp_printf("--\n"); pp_printf("--\n");
if (stats.start_cnt > 1) { if (stats.start_cnt > 1) {
......
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