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Software for White Rabbit PTP Core
Commit 1c80a968 authored by Andela Kostic's avatar Andela Kostic Committed by Tristan Gingold
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Ensure functionality of WRPC testbench (testbench/wrc_core) 

The following files are changed to ensure the functionality of the WRPC
testbench located in "testbench/wrc_core" folder of the wrpc-core repository:
- wrc_main_sim.c
- arch/risc-v/crt0.S
- arch/risc-v/crt0.h
- dev/endpoint.c
- configs/wrpc_sim_riscv_defconfig

Before compiling wrpc-sw for simulation, choose wrpc_sim_riscv_defconfig configuration.

In endpoint.c, delay function is commented out in the case of simulation.
In wrc_main_sim.c, passing information from the testbench to risc-v's software
is fixed and mini-NIC component is initialized correctly. Also, now the program
doesn't print the error message when the Rx FIFO of mini-NIC is empty, but
waits until there is something in the Rx FIFO, and then continues with checking
the correctness of the received frame.
parent 417046ca
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Showing with 218 additions and 34 deletions
arch/risc-v/crt0.S
View file @ 1c80a968
......@@ -44,15 +44,6 @@ version_wrpc:
version_ppsi:
.byte WRS_PPSI_SHMEM_VERSION
.byte 0, 0
#ifdef CONFIG_WR_NODE_SIM
/* Pointer to a structure used by testbenches, use only when
* CONFIG_WR_NODE_SIM is set */
.org HDL_TESTBENCH_PADDR
.global hdl_testbench_p
hdl_testbench_p:
.word hdl_testbench
#endif
.global _reset_handler
.type _reset_handler, @function
......
arch/risc-v/crt0.h
View file @ 1c80a968
......@@ -19,6 +19,4 @@
#define VERSION_WRPC_ADDR 0x28
#define VERSION_PPSI_ADDR 0x29
#define HDL_TESTBENCH_PADDR 0x38
#endif /* __RISCV_CRT0_H__ */
configs/wrpc_sim_riscv_defconfig 0 → 100644
View file @ 1c80a968
#
# Automatically generated file; DO NOT EDIT.
# WR PTP Core software configuration
#
# CONFIG_ARCH_LM32 is not set
CONFIG_ARCH_RISCV=y
# CONFIG_RISCV_COMP_INSTR is not set
CONFIG_DATASIZE=0
CONFIG_TARGET_GENERIC_PHY_8BIT=y
# CONFIG_TARGET_GENERIC_PHY_16BIT is not set
# CONFIG_TARGET_WR_SWITCH is not set
# CONFIG_TARGET_AFCZ_V1 is not set
# CONFIG_TARGET_AFCZ_V2 is not set
# CONFIG_TARGET_ERTM14 is not set
# CONFIG_TARGET_SIS8300KU is not set
# CONFIG_TARGET_PXIE_FMC is not set
# CONFIG_TARGET_WR2RF_VME is not set
# CONFIG_TARGET_SPEC_SILABS is not set
CONFIG_WR_NODE_SIM=y
CONFIG_WR_NODE=y
CONFIG_STACKSIZE=2048
CONFIG_PRINT_BUFSIZE=256
CONFIG_RAMSIZE=196608
CONFIG_TEMP_POLL_INTERVAL=15
CONFIG_TEMP_HIGH_THRESHOLD=70
CONFIG_TEMP_HIGH_RAPPEL=60
# CONFIG_PLL_VERBOSE is not set
# CONFIG_WRC_VERBOSE is not set
# CONFIG_VLAN is not set
CONFIG_VLAN_NR=0
CONFIG_VLAN_1_FOR_CLASS7=0
CONFIG_VLAN_2_FOR_CLASS7=0
CONFIG_VLAN_FOR_CLASS6=0
# CONFIG_HOST_PROCESS is not set
CONFIG_EMBEDDED_NODE=y
CONFIG_WRPC_PPSI=y
CONFIG_LATENCY_ETHTYPE=291
#
# features
#
#
# PPSI config
#
CONFIG_ARCH="wrpc"
CONFIG_ARCH_CFLAGS=""
CONFIG_ARCH_LDFLAGS=""
#
# Options
#
#
# PTP Protocol Options
#
CONFIG_E2E=y
# CONFIG_P2P is not set
CONFIG_E2E_ONLY=y
CONFIG_HAS_P2P=0
# CONFIG_PTP_OVERWRITE_BASIC_ATTRIBUTES is not set
# CONFIG_PTP_OPT_OVERWRITE_ATTRIBUTES is not set
CONFIG_LEAP_SECONDS_VAL=37
#
# Enabled profiles
#
CONFIG_PROFILE_WR=y
# CONFIG_PROFILE_HA is not set
# CONFIG_PROFILE_CUSTOM is not set
CONFIG_PROFILE_PTP=y
CONFIG_HAS_EXT_WR=1
CONFIG_HAS_EXT_L1SYNC=0
CONFIG_HAS_EXT_NONE=0
CONFIG_HAS_PROFILE_PTP=1
CONFIG_HAS_PROFILE_HA=0
CONFIG_HAS_PROFILE_WR=1
CONFIG_HAS_PROFILE_CUSTOM=0
CONFIG_VLAN_ARRAY_SIZE=0
# CONFIG_PPSI_ASSERT is not set
CONFIG_NR_FOREIGN_RECORDS=1
CONFIG_SINGLE_FMASTER=y
CONFIG_NR_PORTS=1
CONFIG_NR_INSTANCES_PER_PORT=1
#
# Code optimization
#
CONFIG_CODEOPT_ENABLED=y
CONFIG_SINGLE_INSTANCE_PER_PORT=y
CONFIG_SINGLE_INSTANCE=y
CONFIG_SINGLE_PORT=y
# CONFIG_CODEOPT_SINGLE_PORT is not set
# CONFIG_CODEOPT_SINGLE_FMASTER is not set
# CONFIG_CODEOPT_SINGLE_INSTANCE_PER_PORT is not set
CONFIG_CODEOPT_WRPC_SIZE=y
CONFIG_CODEOPT_EXT_PORT_CONF_FORCE_DISABLED=y
CONFIG_CODEOPT_SO_FORCE_DISABLED=y
CONFIG_CODEOPT_MO_FORCE_DISABLED=y
CONFIG_CODEOPT_EPC_SO_DISABLED=y
CONFIG_OPTIMIZATION="-Os -ggdb"
# CONFIG_FAULT_INJECTION_MECHANISM is not set
# CONFIG_NO_PTPDUMP is not set
CONFIG_HAS_FAULT_INJECTION_MECHANISM=0
CONFIG_HAS_WRPC_FAULTS=0
CONFIG_HAS_CODEOPT_SINGLE_FMASTER=0
CONFIG_HAS_CODEOPT_SINGLE_PORT=0
CONFIG_HAS_CODEOPT_SINGLE_INSTANCE_PER_PORT=0
CONFIG_HAS_CODEOPT_CODEOPT_WRPC_SIZE=1
CONFIG_HAS_CODEOPT_EXT_PORT_CONF_FORCE_DISABLED=1
CONFIG_HAS_CODEOPT_SO_FORCE_DISABLED=1
CONFIG_HAS_CODEOPT_MO_FORCE_DISABLED=1
CONFIG_HAS_CODEOPT_EPC_ENABLED=0
CONFIG_HAS_CODEOPT_SO_ENABLED=0
CONFIG_ARCH_IS_WRS=0
CONFIG_ARCH_IS_WRPC=1
CONFIG_HAS_PPSI_ASSERT=0
# CONFIG_IP is not set
# CONFIG_WR_DIAG is not set
CONFIG_ABSCAL=y
# CONFIG_LLDP is not set
# CONFIG_TEMP_SENSORS is not set
# CONFIG_GENERIC_SENSORS is not set
# CONFIG_W1 is not set
# CONFIG_FRAC_SPLL is not set
#
# commands
#
# CONFIG_CMD_CONFIG is not set
# CONFIG_BUILD_INIT is not set
CONFIG_HAS_FLASH_INIT=1
CONFIG_FLASH_INIT=y
# CONFIG_CMD_CALIBRATION_SHOW is not set
# CONFIG_CMD_REFRESH is not set
# CONFIG_CMD_PPS is not set
# CONFIG_CMD_SFP_INFO is not set
# CONFIG_SFP_DOM is not set
# CONFIG_CMD_LEAPSEC is not set
# CONFIG_CMD_PTP_ADV is not set
# CONFIG_CMD_MONITOR_SERVO_ERR is not set
# CONFIG_FREQUENCY_MONITOR is not set
#
# wrpc-sw is tainted if you change the following options
#
CONFIG_DEVELOPER=y
# CONFIG_TRACE_MSGS is not set
CONFIG_TRACE_ALL=0
CONFIG_TRACE_MAIN=0
CONFIG_TRACE_STORAGE=0
CONFIG_TRACE_DEVICES=0
CONFIG_TRACE_BOARD=0
CONFIG_TRACE_MAC=0
CONFIG_TRACE_PHY=0
CONFIG_CUSTOM_RAMSIZE=196608
CONFIG_CUSTOM_STACKSIZE=2048
CONFIG_CUSTOM_PRINT_BUFSIZE=256
# CONFIG_CMD_LL is not set
# CONFIG_CMD_SDB_RDUMP is not set
# CONFIG_DAC_LOG is not set
# CONFIG_CHECK_RESET is not set
# CONFIG_SPLL_FIFO_LOG is not set
# CONFIG_VERBOSE_DETAIL is not set
CONFIG_LTO=y
# CONFIG_PRINTF_IS_XINT is not set
CONFIG_PRINTF_IS_FULL=y
# CONFIG_PRINTF_IS_MINI is not set
# CONFIG_PRINTF_IS_NONE is not set
# CONFIG_ASSERT is not set
# CONFIG_DETERMINISTIC_BINARY is not set
# CONFIG_NET_VERBOSE is not set
# CONFIG_LATENCY_PROBE is not set
CONFIG_DEFAULT_PRINT_TASK_TIME_THRESHOLD=0
# CONFIG_PRINTF_XINT is not set
CONFIG_PRINTF_FULL=y
# CONFIG_PRINTF_MINI is not set
# CONFIG_PRINTF_NONE is not set
dev/endpoint.c
View file @ 1c80a968
......@@ -100,9 +100,13 @@ void ep_reset_phy(struct wr_endpoint_device* dev)
we start up the software, otherwise the calibration RX/TX deltas may not be correct */
ep_pcs_write(dev, EP_MDIO_MCR, EP_MDIO_MCR_PDOWN); /* reset the PHY */
phy_dbg("Running long PHY reset...\n");
timer_delay_ms(1000);
phy_dbg("PHY reset complete\n");
/* Don't have delay in simulations */
#ifndef CONFIG_WR_NODE_SIM
phy_dbg("Running long PHY reset...\n");
timer_delay_ms(1000);
phy_dbg("PHY reset complete\n");
#endif
ep_pcs_write(dev, EP_MDIO_MCR, EP_MDIO_MCR_RESET); /* reset the PHY */
ep_pcs_write(dev, EP_MDIO_MCR, 0); /* reset the PHY */
......
wrc_main_sim.c
View file @ 1c80a968
......@@ -39,9 +39,13 @@
#define TESTBENCH_RET_OK 1
#define TESTBENCH_RET_ERROR 2
#define HDL_TESTBENCH_PADDR 0x4000
/* used for synchronization with testbench */
#define TESTBENCH_FLAG 0x12345678
/*
* This is a structure to pass information from the testbench to lm32's
* This is a structure to pass information from the testbench to risc-v's
* software. hdl_testbench structure is meant to be set by testbench through
* memory-manipulation.
*
......@@ -59,14 +63,11 @@ struct hdl_testbench_t {
uint32_t magic;
uint32_t version;
uint32_t test_num;
uint32_t flag;
uint32_t return_val;
};
struct hdl_testbench_t hdl_testbench = {
.magic = TESTBENCH_MAGIC,
.version = TESTBENCH_VERSION,
.test_num = 0,
};
volatile struct hdl_testbench_t *ptr_hdl_testbench;
int wrpc_test_1(void);
......@@ -88,9 +89,11 @@ static void wrc_sim_initialize(void)
mac_addr[5] = 0xBE;
ep_init(&wrc_endpoint_dev, (void *) BASE_EP);
ep_set_mac_addr( &wrc_endpoint_dev, mac_addr );
ep_enable(&wrc_endpoint_dev, 1, 1);
minic_init(&minic, &wrc_endpoint_dev);
minic_init(&minic, (void *) BASE_MINIC);
shw_pps_gen_init();
spll_very_init();
/* wait for link up before enabling tm_time_valid_o */
......@@ -114,7 +117,7 @@ static void wrc_sim_initialize(void)
* 0xAA: this is the first frame (no previous frames)
* 0xBB: previous frame was successfully received
* 0xE*: something was wrong with the previously received frame
* # return value - it is the value returned by the reception funcation
* # return value - it is the value returned by the reception function
*
*/
int wrpc_test_1(void)
......@@ -145,7 +148,7 @@ int wrpc_test_1(void)
memcpy(tx_hdr.dstmac, "\x01\x1B\x19\x00\x00\x00", 6);
tx_hdr.ethtype = htons(0x88f7);
hdl_testbench.return_val = TESTBENCH_RET_OK;
ptr_hdl_testbench->return_val = TESTBENCH_RET_OK;
/** main loop, send test frames */
for (;;) {
/* seqID */
......@@ -163,28 +166,32 @@ int wrpc_test_1(void)
* reception. */
minic_tx_frame(&minic, &tx_hdr, tx_payload, 62, &hwts);
tx_cnt++;
ret = minic_rx_frame(&minic, &rx_hdr, rx_payload,
/* Whait until there is something in the Rx FIFO */
while (ret == 0)
{
ret = minic_rx_frame(&minic, &rx_hdr, rx_payload,
NET_MAX_SKBUF_SIZE, &hwts);
}
/** check whether the received value is OK */
if (ret == 0) {
code = 0xE0; /* Error: returned zero value */
hdl_testbench.return_val = TESTBENCH_RET_ERROR;
ptr_hdl_testbench->return_val = TESTBENCH_RET_ERROR;
}
else if (ret > 0) {
pl_cnt = 0xFFFF & ((tx_payload[0] << 8) | tx_payload[1]);
if (pl_cnt == rx_cnt) {
rx_cnt++;
code = 0xBB; /* OK */
hdl_testbench.return_val = TESTBENCH_RET_OK;
ptr_hdl_testbench->return_val = TESTBENCH_RET_OK;
} else {
rx_cnt = pl_cnt+1;
code = 0xE1; /* Error: wrong seqID */
hdl_testbench.return_val = TESTBENCH_RET_ERROR;
ptr_hdl_testbench->return_val = TESTBENCH_RET_ERROR;
}
} else {
code = 0xE2; /* Error: error of rx */
hdl_testbench.return_val = TESTBENCH_RET_ERROR;
ptr_hdl_testbench->return_val = TESTBENCH_RET_ERROR;
}
}
......@@ -192,19 +199,25 @@ int wrpc_test_1(void)
void main(void)
{
/* Initialize HDL testbench structure */
ptr_hdl_testbench = (struct hdl_testbench_t *) HDL_TESTBENCH_PADDR;
/* Check if testbench wrote data */
while (ptr_hdl_testbench->flag != TESTBENCH_FLAG);
wrc_sim_initialize();
if (hdl_testbench.magic != TESTBENCH_MAGIC
|| hdl_testbench.magic != TESTBENCH_VERSION) {
if (ptr_hdl_testbench->magic != TESTBENCH_MAGIC
|| ptr_hdl_testbench->version != TESTBENCH_VERSION) {
/* Wrong testbench structure */
hdl_testbench.return_val = TESTBENCH_RET_ERROR;
ptr_hdl_testbench->return_val = TESTBENCH_RET_ERROR;
while (1)
;
}
switch (hdl_testbench.test_num) {
switch (ptr_hdl_testbench->test_num) {
case 0:
/* for simulations that just need link-up */
hdl_testbench.return_val = TESTBENCH_RET_NO_TEST;
ptr_hdl_testbench->return_val = TESTBENCH_RET_NO_TEST;
while (1)
;
case 1:
......@@ -212,7 +225,7 @@ void main(void)
break;
default:
/* Wrong test number */
hdl_testbench.return_val = TESTBENCH_RET_ERROR;
ptr_hdl_testbench->return_val = TESTBENCH_RET_ERROR;
while (1)
;
}
......
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