hdl: add force_valid_offline_vtu

b949d498 · Tristan Gingold · 531ca642 · b949d498
Commit b949d498 authored May 10, 2023 by Tristan Gingold
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Showing with 10 additions and 1 deletion

vtu_blk.vhd hdl/rtl/vtu_blk.vhd +10 -1

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--- a/hdl/rtl/vtu_blk.vhd
+++ b/hdl/rtl/vtu_blk.vhd
@@ -123,6 +123,7 @@ architecture rtl of vtu_blk is
    signal params_online : t_vtu_params;

    signal force_valid_offline : std_logic;
+    signal force_valid_offline_vtu : std_logic; -- In clk_vtu domain

    signal vtu_use_sync_as_start : std_logic := '0';

@@ -303,6 +304,14 @@ begin

    vtu_stop <= stop_vtu_pulse or soft_stop_vtu;

+    inst_force_valid_psync: entity work.gc_sync
+        port map (
+            clk_i     => clk_vtu_i,
+            rst_n_a_i => rst_vtu_n,
+            d_i       => force_valid_offline,
+            q_o       => force_valid_offline_vtu
+        );
+
    --  Handle start pulse.
    process (clk_sys_i)
    begin
@@ -401,7 +410,7 @@ begin
                --  Delayed 2 is used by the vtu so that it has enough time to check the values.
                vtu_start_d2 <= vtu_start_d;
                if vtu_start = '1' then
-                    if valid_offline = '1' then
+                    if valid_offline = '1' or force_valid_offline_vtu = '1' then
                        --  CDC
                        --  Registers can be read because they aren't modified
                        --  while the start pulse is transfered.