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wr2rf-vme
Commit b54d0348 authored by Tristan Gingold's avatar Tristan Gingold
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Add bmctrl command and ramps

parent 286074c7
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Showing with 1064473 additions and 9 deletions
software/include/wr2rf_init_regs.h
View file @ b54d0348
......@@ -427,6 +427,20 @@ cs2: IQ DAC 2
#define ADDR_MASK_WR2RF_INIT_REGS_XADC 0x3f00UL
#define WR2RF_INIT_REGS_XADC_SIZE 256 /* 0x100 */
/* Interface to play an ftw sequence */
#define WR2RF_INIT_REGS_BMCTRL_RFFRAME 0x500UL
#define WR2RF_INIT_REGS_BMCTRL_RFFRAME_SIZE 4 /* 0x4 */
/* None */
#define WR2RF_INIT_REGS_BMCTRL_RFFRAME_CTRL 0x500UL
#define WR2RF_INIT_REGS_BMCTRL_RFFRAME_CTRL_RESET 0x1UL
#define WR2RF_INIT_REGS_BMCTRL_RFFRAME_CTRL_EN 0x2UL
#define WR2RF_INIT_REGS_BMCTRL_RFFRAME_CTRL_UPDATE 0x4UL
/* None */
#define WR2RF_INIT_REGS_BMCTRL_RFFRAME_STATUS 0x502UL
#define WR2RF_INIT_REGS_BMCTRL_RFFRAME_STATUS_FIFO_RDY 0x1UL
/* WR ptp core (peripheral only) */
#define WR2RF_INIT_REGS_WRPC 0x2000UL
#define ADDR_MASK_WR2RF_INIT_REGS_WRPC 0x2000UL
......@@ -756,8 +770,17 @@ cs2: IQ DAC 2
/* [0x400]: SUBMAP Xilinx ADC */
uint32_t xadc[64];
/* [0x500]: BLOCK Interface to play an ftw sequence */
struct bmctrl_rfframe {
/* [0x0]: REG (rw) (no description) */
uint16_t ctrl;
/* [0x2]: REG (ro) (no description) */
uint16_t status;
} bmctrl_rfframe;
/* padding to: 2048 words */
uint32_t __padding_8[1728];
uint32_t __padding_8[1727];
/* [0x2000]: SUBMAP WR ptp core (peripheral only) */
uint32_t wrpc[2048];
......
software/libwr2rf/wr2rf.c
View file @ b54d0348
......@@ -20,6 +20,10 @@
#include "wb_uart.h"
#include "regs.h"
#include "../ramps/ramp_lhcpilot.h"
#include "../ramps/ramp_sftpro2.h"
#include "../ramps/ramp_fast_sftpro2.h"
/* [0x10]: REG Hardware Info Register */
#define SYSC_REG_HWIR 0x00000010
......@@ -94,15 +98,78 @@ disp_wrs_rxframe (struct libwr2rf_dev *dev, unsigned count)
static void
ftw_show (struct libwr2rf_dev *dev, int argc, char **argv)
{
unsigned prev = ~0;
unsigned i;
unsigned prev = ~0;
unsigned flag_wait = 0;
unsigned long long prev_ftw = 0;
unsigned repeat = 0;
enum { FTW_RAW, FTW_RAMP, FTW_COMP } mode = FTW_RAW;
while (1)
{
unsigned count = get_wrs_rxframe_counter (dev);
if (count != prev) {
disp_wrs_rxframe (dev, count);
prev = count;
}
for (i = 1; i < argc; i++) {
if (strcmp(argv[i], "help") == 0) {
printf ("usage: %s [wait] [raw|ramp|comp]\n", argv[0]);
return;
} else if (strcmp(argv[i], "wait") == 0)
flag_wait = 1;
else if (strcmp(argv[i], "raw") == 0)
mode = FTW_RAW;
else if (strcmp(argv[i], "ramp") == 0)
mode = FTW_RAMP;
else if (strcmp(argv[i], "comp") == 0)
mode = FTW_COMP;
else {
fprintf (stderr, "unknown option %s\n", argv[i]);
return;
}
if (strcmp(argv[i], "raw") == 0)
mode = FTW_RAW;
}
while (1) {
unsigned count = get_wrs_rxframe_counter (dev);
if (count != prev) {
unsigned ctrl = libwr2rf_read16(dev, WR2RF_VME_REGS_INIT
+ WR2RF_INIT_REGS_WRS_RXFRAME_CTRL);
prev = count;
if (flag_wait && ctrl == 0)
continue;
unsigned ftw2 = libwr2rf_read16(dev, WR2RF_VME_REGS_INIT
+ WR2RF_INIT_REGS_WRS_RXFRAME_FTW + 2);
unsigned ftw1 = libwr2rf_read16(dev, WR2RF_VME_REGS_INIT
+ WR2RF_INIT_REGS_WRS_RXFRAME_FTW + 4);
unsigned ftw0 = libwr2rf_read16(dev, WR2RF_VME_REGS_INIT
+ WR2RF_INIT_REGS_WRS_RXFRAME_FTW + 6);
unsigned long long ftw =
((unsigned long long)ftw2 << 32) | (ftw1 << 16) | ftw0;
switch (mode) {
case FTW_RAMP:
/* Format: {0x0000, 0x0016bc3d6025}, */
printf ("{0x%04x, 0x%012llx},\n", ctrl, ftw);
break;
case FTW_COMP:
if (flag_wait) {
printf ("{0x%04x, 0x%012llx} /* init */\n", ctrl, ftw);
prev_ftw = ftw;
repeat = 0;
}
else if (ftw == prev_ftw)
repeat++;
else {
printf ("{0x%012llx, %u}, /* d=%lld */\n",
ftw, repeat, ftw - prev_ftw);
prev_ftw = ftw;
repeat = 0;
}
break;
default:
printf ("RX frame count: %04x, ctrl: %04x, ftw: %012llx\n",
count, ctrl, ftw);
break;
}
flag_wait = 0;
}
}
}
......@@ -4475,6 +4542,191 @@ calib_vtu (struct libwr2rf_dev *dev, int argc, char **argv)
}
}
static void
bmctrl (struct libwr2rf_dev *dev, int argc, char **argv)
{
unsigned long long ftw_h1_init = 0x16B24A8FB6ULL;
unsigned control_init = 0x0007;
unsigned long long ftw_h1 = ftw_h1_init;
unsigned control = control_init;
unsigned bmctrl_status = 0;
unsigned bmctrl_ctrl = 0;
unsigned cnt = 0;
unsigned ramp = 0;
size_t rampsize = 0;
unsigned laddr = WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_LEMO;
unsigned flag_once = 0;
unsigned loop;
if (strcmp(argv[1], "1") == 0) {
flag_once = 1;
argc--;
argv++;
}
/* Choose a ramp program fixed_200, sftpro2, hiradmat, lhcpilot */
if (argc != 2)
goto usage;
if (strcmp(argv[1], "status") == 0) {
bmctrl_status = libwr2rf_read16(dev, WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_BMCTRL_RFFRAME_STATUS);
printf ("bmctrl status: %04x\n", bmctrl_status);
bmctrl_ctrl = libwr2rf_read16(dev, WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_BMCTRL_RFFRAME_CTRL);
printf ("bmctrl control: %04x\n", bmctrl_ctrl);
return;
} else if (strcmp(argv[1], "reset") == 0) {
ramp = 0;
rampsize = 1;
} else if (strcmp(argv[1], "fixed_200") == 0) {
ramp = 1;
rampsize = 1;
} else if (strcmp(argv[1], "two_tone") == 0) {
ramp = 2;
rampsize = 100000;
} else if (strcmp(argv[1], "lhcpilot") == 0) {
ramp = 3;
rampsize = sizeof(ramp_lhcpilot)/sizeof(ramp_lhcpilot[0]);
} else if (strcmp(argv[1], "sftpro2") == 0) {
ramp = 4;
rampsize = sizeof(ramp_sftpro2)/sizeof(ramp_sftpro2[0]);
} else if (strcmp(argv[1], "fast_sftpro2") == 0) {
ramp = 5;
rampsize = sizeof(ramp_fast_sftpro2)/sizeof(ramp_fast_sftpro2[0]);
} else if (strcmp(argv[1], "ramp_man") == 0) {
ramp = 6;
rampsize = 100000;
} else {
goto usage;
}
// Use an internal register source for FTWs rather than the WR network
libwr2rf_write16(dev, WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_NCO_LOC_OR_WRS,
WR2RF_INIT_REGS_NCO_LOC_OR_WRS_PARAMS_SEL);
// init the beam control fifo + registers
bmctrl_ctrl = WR2RF_INIT_REGS_BMCTRL_RFFRAME_CTRL_RESET;
sleep(0.1);
libwr2rf_write16(dev, WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_BMCTRL_RFFRAME_CTRL, bmctrl_ctrl);
libwr2rf_write16(dev, WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_BMCTRL_RFFRAME_CTRL, 0);
bmctrl_ctrl = WR2RF_INIT_REGS_BMCTRL_RFFRAME_CTRL_EN;
libwr2rf_write16(dev, WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_BMCTRL_RFFRAME_CTRL, bmctrl_ctrl);
printf ("Ramp=%d rampsize=%ld cnt=%d\n", ramp, rampsize, cnt);
while (1) {
switch (ramp) {
case 0:
ftw_h1 = 0x0;
control = control_init;
break;
case 1:
ftw_h1 = ftw_h1_init;
control = control_init;
break;
case 2:
if (cnt == 0) {
ftw_h1 = 0x1620ED7A30; //195 MHz */
control = control_init;
rampsize = 5000;
} else if (cnt < 1000) {
ftw_h1 = 0x1620ED7A30; //195 MHz */
control = 0;
} else if (cnt >= 1000 && cnt < 2000) {
ftw_h1 = 0x1743824F94;
control = 0;
} else {
cnt = 1;
}
break;
case 3:
if (cnt >= rampsize) {
cnt = 0;
printf("New Ramp LHCPilot\n");
}
ftw_h1 = ramp_lhcpilot[cnt].ftw_h1;
control = ramp_lhcpilot[cnt].ctrl;
break;
case 4:
if (cnt >= rampsize) {
cnt = 0;
printf("New Ramp sftpro2\n");
}
ftw_h1 = ramp_sftpro2[cnt].ftw_h1;
control = ramp_sftpro2[cnt].ctrl;
break;
case 5:
if (cnt >= rampsize) {
cnt = 1;
printf("New Ramp fast sftpro2\n");
}
ftw_h1 = ramp_fast_sftpro2[cnt].ftw_h1;
control = ramp_fast_sftpro2[cnt].ctrl;
if (cnt == 0)
printf("control=%08x\n", control);
break;
case 6:
if (cnt == 0) {
ftw_h1 = 0x1620ED7A30; //195 MHz
control = control_init;
rampsize = 2;
} else if (ftw_h1 >= 0x1743824F94) {
rampsize = 0;
} else {
ftw_h1 = ftw_h1 + 0x10000;
control = 0;
rampsize++;
}
break;
default:
printf ("Unrecognised ramp mode...\n");
return;
}
loop = 0;
do { // Check that the frame-fifo is ready to receive another FTW frame
bmctrl_status = libwr2rf_read16(dev, WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_BMCTRL_RFFRAME_STATUS);
if (bmctrl_status != WR2RF_INIT_REGS_BMCTRL_RFFRAME_STATUS_FIFO_RDY ) {
libwr2rf_write16(dev, laddr, 1);
libwr2rf_write16(dev, laddr, 0);
}
if (loop++ == 50000) {
printf ("waiting...\n");
loop = 0;
}
} while ( bmctrl_status != WR2RF_INIT_REGS_BMCTRL_RFFRAME_STATUS_FIFO_RDY );
// write the FTW frame requested..
libwr2rf_write16(dev, WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_TXFRAME_FTW_H1_MAIN + 2, ftw_h1 >> 32);
libwr2rf_write16(dev, WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_TXFRAME_FTW_H1_MAIN + 4, ftw_h1 >> 16);
libwr2rf_write16(dev, WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_TXFRAME_FTW_H1_MAIN + 6, ftw_h1 >> 0);
libwr2rf_write16(dev, WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_TXFRAME_CONTROL, control);
// Flush the ftw frame into the FTW frame fifo
bmctrl_ctrl = WR2RF_INIT_REGS_BMCTRL_RFFRAME_CTRL_EN | WR2RF_INIT_REGS_BMCTRL_RFFRAME_CTRL_UPDATE;
libwr2rf_write16(dev, WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_BMCTRL_RFFRAME_CTRL, bmctrl_ctrl);
cnt++;
if (cnt >= rampsize) {
if (flag_once)
return;
/* Restart (without reset). */
cnt = 1;
}
}
return;
usage:
printf ("Unrecognised cycle mode. Available modes are: \n");
printf (" reset, fixed_200, ramp_man, lhcpilot, sftpro2, fast_sftpro2, two_tone\n");
}
static void cmd_help (struct libwr2rf_dev *dev, int argc, char **argv);
struct cmds {
......@@ -4607,6 +4859,7 @@ static struct cmds cmds[] =
{ "vtu-odelay", vtu_odelay, "Can be used to set the fpga VTU odelay cells. Used for validation only of trig odelay, not runtime."},
{ "calib-dds-ioupdate", calib_dds_ioupdate, "generate local nco reset to calibate the dds ioupdate delay"},
{ "calib-vtu", calib_vtu, "generate local nco reset to calibate a vtu"},
{ "bmctrl", bmctrl, "simulate beam-control (send ftw sequence)"},
{ NULL, NULL, NULL }
};
......
software/ramps/ramp.h 0 → 100644
View file @ b54d0348
#ifndef __RAMP_H_
#define __RAMP_H_
typedef struct ramp_ {
unsigned ctrl;
unsigned long long ftw_h1;
} ramp_t;
#endif
software/ramps/ramp_fast_sftpro2.h 0 → 100644
View file @ b54d0348
This source diff could not be displayed because it is too large. You can view the blob instead.
software/ramps/ramp_lhcpilot.h 0 → 100644
View file @ b54d0348
This source diff could not be displayed because it is too large. You can view the blob instead.
software/ramps/ramp_sftpro2.h 0 → 100644
View file @ b54d0348
This source diff could not be displayed because it is too large. You can view the blob instead.
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