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wr2rf-vme
Commits
89f2d5ce
Commit
89f2d5ce
authored
Jun 26, 2020
by
Dimitris Lampridis
Committed by
Tristan Gingold
Jun 29, 2020
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Plain Diff
add separate signals for second EEPROM.
See also:
#40
parent
ca8834f2
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1 changed file
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24 additions
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12 deletions
+24
-12
wr2rf_vme.xdc
hdl/syn/wr2rf_vme.xdc
+24
-12
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hdl/syn/wr2rf_vme.xdc
View file @
89f2d5ce
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@@ -4,7 +4,8 @@ set_property direction IN [get_ports {clk_dmtd_62m5_n_i}]
set_property direction IN [get_ports {clk_dmtd_62m5_p_i}]
set_property direction IN [get_ports {clk_ext_10m_n_i}]
set_property direction IN [get_ports {clk_ext_10m_p_i}]
set_property direction INOUT [get_ports {wr_eeprom_sda_b}]
set_property direction INOUT [get_ports {wr_eeprom1_sda_b}]
set_property direction INOUT [get_ports {wr_eeprom2_sda_b}]
set_property direction INOUT [get_ports {wr_onewire_b}]
set_property direction IN [get_ports {clk_sys_62m5_n_i}]
set_property direction IN [get_ports {clk_sys_62m5_p_i}]
...
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@@ -24,7 +25,8 @@ set_property direction OUT [get_ports {wr_dac_ocxo_cs_n_o}]
set_property direction OUT [get_ports {wr_dac_dmtd_sclk_o}]
set_property direction OUT [get_ports {wr_dac_dmtd_din_o}]
set_property direction OUT [get_ports {wr_dac_dmtd_cs_n_o}]
set_property direction INOUT [get_ports {wr_eeprom_scl_b}]
set_property direction INOUT [get_ports {wr_eeprom1_scl_b}]
set_property direction INOUT [get_ports {wr_eeprom2_scl_b}]
set_property direction OUT [get_ports {pll_main_cs_n_o}]
set_property direction OUT [get_ports {pll_main_sclk_o}]
set_property direction OUT [get_ports {pll_main_sdi_o}]
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@@ -434,7 +436,8 @@ set_property OFFCHIP_TERM NONE [get_ports rf2_t1_mux_sel_o]
set_property OFFCHIP_TERM NONE [get_ports rf2_t2_delay_latch_o]
set_property OFFCHIP_TERM NONE [get_ports rf2_t2_delay_oen_o]
set_property OFFCHIP_TERM NONE [get_ports rf2_t2_mux_sel_o]
set_property OFFCHIP_TERM NONE [get_ports wr_eeprom_sda_b]
set_property OFFCHIP_TERM NONE [get_ports wr_eeprom1_sda_b]
set_property OFFCHIP_TERM NONE [get_ports wr_eeprom2_sda_b]
set_property OFFCHIP_TERM NONE [get_ports rf_delay_o[0]]
set_property OFFCHIP_TERM NONE [get_ports rf_delay_o[1]]
set_property OFFCHIP_TERM NONE [get_ports rf_delay_o[2]]
...
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@@ -592,7 +595,8 @@ set_property OFFCHIP_TERM NONE [get_ports wr_dac_dmtd_sclk_o]
set_property OFFCHIP_TERM NONE [get_ports wr_dac_ocxo_cs_n_o]
set_property OFFCHIP_TERM NONE [get_ports wr_dac_ocxo_din_o]
set_property OFFCHIP_TERM NONE [get_ports wr_dac_ocxo_sclk_o]
set_property OFFCHIP_TERM NONE [get_ports wr_eeprom_scl_b]
set_property OFFCHIP_TERM NONE [get_ports wr_eeprom1_scl_b]
set_property OFFCHIP_TERM NONE [get_ports wr_eeprom2_scl_b]
set_property IOSTANDARD LVDS [get_ports {rf1_iqdac_data_p_o[0]}]
set_property IOSTANDARD LVDS [get_ports {rf1_iqdac_data_p_o[1]}]
set_property IOSTANDARD LVDS [get_ports {rf1_iqdac_data_p_o[2]}]
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@@ -750,12 +754,18 @@ set_property SLEW SLOW [get_ports pll_main_cs_n_o]
set_property IOSTANDARD LVCMOS33 [get_ports pll_main_sdo_i]
set_property IOSTANDARD LVCMOS33 [get_ports {pll_main_stat_i[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {pll_main_stat_i[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports wr_eeprom_scl_b]
set_property DRIVE 12 [get_ports wr_eeprom_scl_b]
set_property SLEW SLOW [get_ports wr_eeprom_scl_b]
set_property IOSTANDARD LVCMOS33 [get_ports wr_eeprom_sda_b]
set_property DRIVE 12 [get_ports wr_eeprom_sda_b]
set_property SLEW SLOW [get_ports wr_eeprom_sda_b]
set_property IOSTANDARD LVCMOS33 [get_ports wr_eeprom1_scl_b]
set_property IOSTANDARD LVCMOS33 [get_ports wr_eeprom2_scl_b]
set_property IOSTANDARD LVCMOS33 [get_ports wr_eeprom1_sda_b]
set_property IOSTANDARD LVCMOS33 [get_ports wr_eeprom2_sda_b]
set_property DRIVE 12 [get_ports wr_eeprom1_scl_b]
set_property SLEW SLOW [get_ports wr_eeprom1_scl_b]
set_property DRIVE 12 [get_ports wr_eeprom2_scl_b]
set_property SLEW SLOW [get_ports wr_eeprom2_scl_b]
set_property DRIVE 12 [get_ports wr_eeprom1_sda_b]
set_property SLEW SLOW [get_ports wr_eeprom1_sda_b]
set_property DRIVE 12 [get_ports wr_eeprom2_sda_b]
set_property SLEW SLOW [get_ports wr_eeprom2_sda_b]
set_property IOSTANDARD LVCMOS33 [get_ports wr_onewire_b]
set_property DRIVE 12 [get_ports wr_onewire_b]
set_property SLEW SLOW [get_ports wr_onewire_b]
...
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@@ -1023,8 +1033,10 @@ set_property PACKAGE_PIN B16 [get_ports wr_dac_dmtd_sclk_o]
set_property PACKAGE_PIN H14 [get_ports wr_dac_ocxo_cs_n_o]
set_property PACKAGE_PIN G14 [get_ports wr_dac_ocxo_din_o]
set_property PACKAGE_PIN H12 [get_ports wr_dac_ocxo_sclk_o]
set_property PACKAGE_PIN L17 [get_ports wr_eeprom_sda_b]
set_property PACKAGE_PIN K18 [get_ports wr_eeprom_scl_b]
set_property PACKAGE_PIN L17 [get_ports wr_eeprom1_sda_b]
set_property PACKAGE_PIN K18 [get_ports wr_eeprom1_scl_b]
set_property PACKAGE_PIN L19 [get_ports wr_eeprom2_sda_b]
set_property PACKAGE_PIN L20 [get_ports wr_eeprom2_scl_b]
set_property PROHIBIT true [get_bels IOB_X0Y180/PAD]
set_property PROHIBIT true [get_sites E15]
set_property PROHIBIT true [get_bels IOB_X0Y186/PAD]
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