Commit 3dcdded5 authored by John Robert Gill's avatar John Robert Gill

Added API to configure pad to external ff delay.

parent 29573f10
...@@ -529,8 +529,8 @@ static unsigned libwr2rf_vtu_csr(unsigned id) ...@@ -529,8 +529,8 @@ static unsigned libwr2rf_vtu_csr(unsigned id)
} }
} }
int libwr2rf_vtu_output_delay(struct libwr2rf_dev *dev, unsigned id, int libwr2rf_vtu_output_ff_delay(struct libwr2rf_dev *dev, unsigned id,
unsigned val) unsigned val)
{ {
unsigned csr_addr; unsigned csr_addr;
unsigned del_addr = WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_RF + unsigned del_addr = WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_RF +
...@@ -554,6 +554,34 @@ int libwr2rf_vtu_output_delay(struct libwr2rf_dev *dev, unsigned id, ...@@ -554,6 +554,34 @@ int libwr2rf_vtu_output_delay(struct libwr2rf_dev *dev, unsigned id,
return 0; return 0;
} }
int libwr2rf_vtu_output_pad_delay(struct libwr2rf_dev *dev, unsigned id,
unsigned hc, unsigned odelay)
{
unsigned baddr;
switch (id) {
case LIBWR2RF_TRIG_ID_RF_1_TRIG_1:
baddr = WR2RF_VME_REGS_CTRL + WR2RF_CTRL_REGS_RF1_VTUS + WR2RF_RFTRIGGER_REGS_T1;
break;
case LIBWR2RF_TRIG_ID_RF_1_TRIG_2:
baddr = WR2RF_VME_REGS_CTRL + WR2RF_CTRL_REGS_RF1_VTUS + WR2RF_RFTRIGGER_REGS_T2;
break;
case LIBWR2RF_TRIG_ID_RF_2_TRIG_1:
baddr = WR2RF_VME_REGS_CTRL + WR2RF_CTRL_REGS_RF2_VTUS + WR2RF_RFTRIGGER_REGS_T1;
break;
case LIBWR2RF_TRIG_ID_RF_2_TRIG_2:
baddr = WR2RF_VME_REGS_CTRL + WR2RF_CTRL_REGS_RF2_VTUS + WR2RF_RFTRIGGER_REGS_T2;
break;
default:
return -1;
}
libwr2rf_write16(dev, baddr + TRIGUNIT_REGS_TRIGOHCDELAY, hc);
libwr2rf_write16(dev, baddr + TRIGUNIT_REGS_TRIGODELAY, odelay);
return 0;
}
int libwr2rf_vtu_output_enable(struct libwr2rf_dev *dev, unsigned id, int libwr2rf_vtu_output_enable(struct libwr2rf_dev *dev, unsigned id,
unsigned en) unsigned en)
{ {
...@@ -787,7 +815,7 @@ int libwr2rf_vtu_program_highfreq (struct libwr2rf_dev *dev, unsigned id, ...@@ -787,7 +815,7 @@ int libwr2rf_vtu_program_highfreq (struct libwr2rf_dev *dev, unsigned id,
} }
int libwr2rf_vtu_nco_reset_delay (struct libwr2rf_dev *dev, unsigned id, int libwr2rf_vtu_nco_reset_delay (struct libwr2rf_dev *dev, unsigned id,
unsigned cdelay, unsigned fdelay) unsigned cdelay, unsigned fdelay, unsigned odelay)
{ {
unsigned addr; unsigned addr;
...@@ -796,11 +824,11 @@ int libwr2rf_vtu_nco_reset_delay (struct libwr2rf_dev *dev, unsigned id, ...@@ -796,11 +824,11 @@ int libwr2rf_vtu_nco_reset_delay (struct libwr2rf_dev *dev, unsigned id,
switch (id) switch (id)
{ {
case LIBWR2RF_TRIG_ID_RF_1_TRIG_1: case LIBWR2RF_RF1_CHANNEL_ID:
addr += addr + WR2RF_INIT_RF_REGS_RF1; addr = addr + WR2RF_INIT_RF_REGS_RF1;
break; break;
case LIBWR2RF_TRIG_ID_RF_2_TRIG_1: case LIBWR2RF_RF2_CHANNEL_ID:
addr += addr + WR2RF_INIT_RF_REGS_RF2; addr = addr + WR2RF_INIT_RF_REGS_RF2;
break; break;
default: default:
return -1; return -1;
...@@ -810,8 +838,10 @@ int libwr2rf_vtu_nco_reset_delay (struct libwr2rf_dev *dev, unsigned id, ...@@ -810,8 +838,10 @@ int libwr2rf_vtu_nco_reset_delay (struct libwr2rf_dev *dev, unsigned id,
WR2RF_INIT_RF_CH_REGS_T1_SYNC_PROGDELAY_CDELAY_MASK; WR2RF_INIT_RF_CH_REGS_T1_SYNC_PROGDELAY_CDELAY_MASK;
fdelay = (fdelay << WR2RF_INIT_RF_CH_REGS_T1_SYNC_PROGDELAY_FDELAY_SHIFT) & fdelay = (fdelay << WR2RF_INIT_RF_CH_REGS_T1_SYNC_PROGDELAY_FDELAY_SHIFT) &
WR2RF_INIT_RF_CH_REGS_T1_SYNC_PROGDELAY_FDELAY_MASK; WR2RF_INIT_RF_CH_REGS_T1_SYNC_PROGDELAY_FDELAY_MASK;
odelay = (odelay << WR2RF_INIT_RF_CH_REGS_T1_SYNC_PROGDELAY_ODELAY_SHIFT) &
WR2RF_INIT_RF_CH_REGS_T1_SYNC_PROGDELAY_ODELAY_MASK;
libwr2rf_write16(dev, addr, fdelay | cdelay); libwr2rf_write16(dev, addr, odelay | fdelay | cdelay);
return 0; return 0;
} }
...@@ -852,7 +882,7 @@ libwr2rf_configure_tmgio(struct libwr2rf_dev *dev, unsigned lemo, unsigned oe, u ...@@ -852,7 +882,7 @@ libwr2rf_configure_tmgio(struct libwr2rf_dev *dev, unsigned lemo, unsigned oe, u
// OE bit // OE bit
mask = 1 << (lemo - 1 + WR2RF_INIT_REGS_TMG_IO_OE_SHIFT); mask = 1 << (lemo - 1 + WR2RF_INIT_REGS_TMG_IO_OE_SHIFT);
if (term) if (oe)
bval |= mask; bval |= mask;
else else
bval &= ~mask; bval &= ~mask;
...@@ -879,7 +909,7 @@ libwr2rf_configure_tmgclk(struct libwr2rf_dev *dev, unsigned lemo, unsigned oe, ...@@ -879,7 +909,7 @@ libwr2rf_configure_tmgclk(struct libwr2rf_dev *dev, unsigned lemo, unsigned oe,
// OE bit // OE bit
mask = 1 << (lemo - 1 + WR2RF_INIT_REGS_TMG_CLK_OE_SHIFT); mask = 1 << (lemo - 1 + WR2RF_INIT_REGS_TMG_CLK_OE_SHIFT);
if (term) if (oe)
bval |= mask; bval |= mask;
else else
bval &= ~mask; bval &= ~mask;
......
...@@ -255,8 +255,8 @@ libwr2rf_api_init (struct libwr2rf_dev *dev) ...@@ -255,8 +255,8 @@ libwr2rf_api_init (struct libwr2rf_dev *dev)
libwr2rf_set_wrs_timeout_latency (dev, 2000); libwr2rf_set_wrs_timeout_latency (dev, 2000);
/* Command nco-reset-delay */ /* Command nco-reset-delay */
libwr2rf_vtu_nco_reset_delay(dev, 1, 75, 9); libwr2rf_vtu_nco_reset_delay(dev, LIBWR2RF_RF1_CHANNEL_ID, 75, 5, 0xa);
libwr2rf_vtu_nco_reset_delay(dev, 2, 75, 0); libwr2rf_vtu_nco_reset_delay(dev, LIBWR2RF_RF2_CHANNEL_ID, 75, 4, 0x14);
return 0; return 0;
} }
......
...@@ -110,6 +110,9 @@ int libwr2rf_enable_diag(struct libwr2rf_dev *dev, unsigned id, ...@@ -110,6 +110,9 @@ int libwr2rf_enable_diag(struct libwr2rf_dev *dev, unsigned id,
int libwr2rf_read_diag(struct libwr2rf_dev *dev, unsigned id, int libwr2rf_read_diag(struct libwr2rf_dev *dev, unsigned id,
unsigned *freq, unsigned *count, unsigned *generation); unsigned *freq, unsigned *count, unsigned *generation);
#define LIBWR2RF_RF1_CHANNEL_ID 1
#define LIBWR2RF_RF2_CHANNEL_ID 2
/* Trigger units. */ /* Trigger units. */
#define LIBWR2RF_TRIG_ID_RF_1_TRIG_1 0 #define LIBWR2RF_TRIG_ID_RF_1_TRIG_1 0
#define LIBWR2RF_TRIG_ID_RF_1_TRIG_2 1 #define LIBWR2RF_TRIG_ID_RF_1_TRIG_2 1
...@@ -156,7 +159,7 @@ int libwr2rf_vtu_softstop (struct libwr2rf_dev *dev, unsigned id); ...@@ -156,7 +159,7 @@ int libwr2rf_vtu_softstop (struct libwr2rf_dev *dev, unsigned id);
int libwr2rf_vtu_softstart (struct libwr2rf_dev *dev, unsigned id); int libwr2rf_vtu_softstart (struct libwr2rf_dev *dev, unsigned id);
/* Program the delay line of a VTU. VAL is the delay (TBD). */ /* Program the delay line of a VTU. VAL is the delay (TBD). */
int libwr2rf_vtu_output_delay(struct libwr2rf_dev *dev, unsigned id, int libwr2rf_vtu_output_ff_delay(struct libwr2rf_dev *dev, unsigned id,
unsigned val); unsigned val);
/* Enable the VTU output. */ /* Enable the VTU output. */
...@@ -190,7 +193,7 @@ int libwr2rf_vtu_program_window (struct libwr2rf_dev *dev, unsigned id, ...@@ -190,7 +193,7 @@ int libwr2rf_vtu_program_window (struct libwr2rf_dev *dev, unsigned id,
/* Specify the delay between the NCO reset (from WR) and the sync input of /* Specify the delay between the NCO reset (from WR) and the sync input of
trig 1. CDELAY unit is 16ns, FDELAY unit is 1ns. */ trig 1. CDELAY unit is 16ns, FDELAY unit is 1ns. */
int libwr2rf_vtu_nco_reset_delay (struct libwr2rf_dev *dev, unsigned id, int libwr2rf_vtu_nco_reset_delay (struct libwr2rf_dev *dev, unsigned id,
unsigned cdelay, unsigned fdelay); unsigned cdelay, unsigned fdelay, unsigned odelay);
/* Specify the ioupdate fine delay and ODELAY values */ /* Specify the ioupdate fine delay and ODELAY values */
int libwr2rf_ioupdate_delay (struct libwr2rf_dev *dev, unsigned fdelay, unsigned odelay); int libwr2rf_ioupdate_delay (struct libwr2rf_dev *dev, unsigned fdelay, unsigned odelay);
......
...@@ -418,7 +418,7 @@ usage: ...@@ -418,7 +418,7 @@ usage:
static void static void
nco_reset_ctrl (struct libwr2rf_dev *dev, int argc, char **argv) nco_reset_ctrl (struct libwr2rf_dev *dev, int argc, char **argv)
{ {
unsigned addr = WR2RF_VME_REGS_CTRL + WR2RF_CTRL_REGS_RF1_RFNCO; unsigned addr = WR2RF_VME_REGS_CTRL + WR2RF_CTRL_REGS_NCO_RESET_CTRL;
unsigned v = libwr2rf_read16(dev, addr); unsigned v = libwr2rf_read16(dev, addr);
unsigned set = 0; unsigned set = 0;
...@@ -462,7 +462,7 @@ nco_reset_ctrl (struct libwr2rf_dev *dev, int argc, char **argv) ...@@ -462,7 +462,7 @@ nco_reset_ctrl (struct libwr2rf_dev *dev, int argc, char **argv)
v = v | WR2RF_CTRL_REGS_NCO_RESET_CTRL_MASK_RF2_TRIG1; v = v | WR2RF_CTRL_REGS_NCO_RESET_CTRL_MASK_RF2_TRIG1;
else else
v = v & ~WR2RF_CTRL_REGS_NCO_RESET_CTRL_MASK_RF2_TRIG1; v = v & ~WR2RF_CTRL_REGS_NCO_RESET_CTRL_MASK_RF2_TRIG1;
} else if (strcmp (argv[1], "soft") == 0) { } else if (strcmp (argv[1], "soft_nco_reset") == 0) {
if (set == 1) // autoclr register if (set == 1) // autoclr register
v = v | WR2RF_CTRL_REGS_NCO_RESET_CTRL_SOFT; v = v | WR2RF_CTRL_REGS_NCO_RESET_CTRL_SOFT;
} else { } else {
...@@ -2024,25 +2024,26 @@ disp_tmg(struct libwr2rf_dev *dev) ...@@ -2024,25 +2024,26 @@ disp_tmg(struct libwr2rf_dev *dev)
val = libwr2rf_read16(dev, addr); val = libwr2rf_read16(dev, addr);
printf ("Complete TMG register: tmg[15:0]=%04x\n", val); printf ("Complete TMG register: tmg[15:0]=%04x\n", val);
printf (" tmg io term:"); printf (" tmg io term :");
for (i = 0; i < 4; i++) for (i = 0; i < 4; i++)
printf (" %u:%u", printf (" %u:%u",
i, (val >> (WR2RF_INIT_REGS_TMG_IO_TERM_SHIFT + i)) & 1); i+1, (val >> (WR2RF_INIT_REGS_TMG_IO_TERM_SHIFT + i)) & 1);
printf ("\n"); printf ("\n");
printf (" tmg io oen: "); printf (" tmg io oe :");
for (i = 0; i < 4; i++) for (i = 0; i < 4; i++)
printf (" %u:%u", printf (" %u:%u",
i, (val >> (WR2RF_INIT_REGS_TMG_IO_OE_SHIFT + i)) & 1); i+1, (val >> (WR2RF_INIT_REGS_TMG_IO_OE_SHIFT + i)) & 1);
printf ("\n"); printf ("\n");
printf (" tmg clk term:"); printf (" tmg clk term:");
for (i = 0; i < 2; i++) for (i = 0; i < 2; i++)
printf (" %u:%u", printf (" %u:%u",
i, (val >> (WR2RF_INIT_REGS_TMG_CLK_TERM_SHIFT + i)) & 1); i+1, (val >> (WR2RF_INIT_REGS_TMG_CLK_TERM_SHIFT + i)) & 1);
printf ("\n"); printf ("\n");
printf (" tmg clk oen: "); printf (" tmg clk oe :");
for (i = 0; i < 2; i++) for (i = 0; i < 2; i++)
printf (" %u:%u", printf (" %u:%u",
i, (val >> (WR2RF_INIT_REGS_TMG_CLK_OE_SHIFT + i)) & 1); i+1, (val >> (WR2RF_INIT_REGS_TMG_CLK_OE_SHIFT + i)) & 1);
printf ("\n"); printf ("\n");
printf ("\n"); printf ("\n");
} }
...@@ -3101,7 +3102,7 @@ api_vtu_stop_lemo (struct libwr2rf_dev *dev, int argc, char **argv) ...@@ -3101,7 +3102,7 @@ api_vtu_stop_lemo (struct libwr2rf_dev *dev, int argc, char **argv)
} }
static void static void
api_vtu_output_delay (struct libwr2rf_dev *dev, int argc, char **argv) api_vtu_output_ff_delay (struct libwr2rf_dev *dev, int argc, char **argv)
{ {
int res; int res;
unsigned long id; unsigned long id;
...@@ -3114,12 +3115,37 @@ api_vtu_output_delay (struct libwr2rf_dev *dev, int argc, char **argv) ...@@ -3114,12 +3115,37 @@ api_vtu_output_delay (struct libwr2rf_dev *dev, int argc, char **argv)
id = parse_api_vtu (argv[1]); id = parse_api_vtu (argv[1]);
if (id == BADADDR) if (id == BADADDR)
return; return;
delay = strtoul (argv[2], NULL, 0); delay = strtoul (argv[2], NULL, 0);
res = libwr2rf_vtu_output_delay(dev, id, delay); res = libwr2rf_vtu_output_ff_delay(dev, id, delay);
if (res != 0) if (res != 0)
printf ("failed (status=%d)\n", res); printf ("failed (status=%d)\n", res);
} }
static void
api_vtu_output_pad_delay (struct libwr2rf_dev *dev, int argc, char **argv)
{
int res;
unsigned long id;
unsigned long hc;
unsigned long odelay;
if (argc != 4) {
printf ("usage: %s VTU-ID half_cycle ODELAY\n", argv[0]);
return;
}
id = parse_api_vtu (argv[1]);
if (id == BADADDR)
return;
hc = strtoul (argv[2], NULL, 0);
odelay = strtoul (argv[3], NULL, 0);
res = libwr2rf_vtu_output_pad_delay(dev, id, hc, odelay);
if (res != 0)
printf ("failed (status=%d)\n", res);
}
static void static void
api_vtu_output_enable (struct libwr2rf_dev *dev, int argc, char **argv) api_vtu_output_enable (struct libwr2rf_dev *dev, int argc, char **argv)
{ {
...@@ -3268,17 +3294,19 @@ api_nco_reset_delay (struct libwr2rf_dev *dev, int argc, char **argv) ...@@ -3268,17 +3294,19 @@ api_nco_reset_delay (struct libwr2rf_dev *dev, int argc, char **argv)
int ch; int ch;
unsigned cdelay; unsigned cdelay;
unsigned fdelay; unsigned fdelay;
unsigned odelay;
if (argc != 3) { if (argc != 5) {
printf ("usage: %s CH COARSE FINE\n", argv[0]); printf ("usage: %s CH COARSE FINE ODELAY\n", argv[0]);
return; return;
} }
ch = strtoul(argv[1], NULL, 0); ch = strtoul(argv[1], NULL, 0);
cdelay = strtoul(argv[2], NULL, 0); cdelay = strtoul(argv[2], NULL, 0);
fdelay = strtoul(argv[3], NULL, 0); fdelay = strtoul(argv[3], NULL, 0);
odelay = strtoul(argv[4], NULL, 0);
if (libwr2rf_vtu_nco_reset_delay(dev, ch, cdelay, fdelay) != 0) if (libwr2rf_vtu_nco_reset_delay(dev, ch, cdelay, fdelay, odelay) != 0)
printf ("ERROR\n"); printf ("ERROR\n");
} }
...@@ -3320,7 +3348,7 @@ api_tmgclk (struct libwr2rf_dev *dev, int argc, char **argv) ...@@ -3320,7 +3348,7 @@ api_tmgclk (struct libwr2rf_dev *dev, int argc, char **argv)
} }
lemo = strtoul(argv[1], NULL, 0); lemo = strtoul(argv[1], NULL, 0);
oe = strtoul(argv[2], NULL, 0); oe = strtoul(argv[2], NULL, 0);
term = strtoul(argv[3], NULL, 0); term = strtoul(argv[3], NULL, 0);
if (libwr2rf_configure_tmgclk(dev, lemo, oe, term)) if (libwr2rf_configure_tmgclk(dev, lemo, oe, term))
...@@ -3340,7 +3368,7 @@ api_tmgio (struct libwr2rf_dev *dev, int argc, char **argv) ...@@ -3340,7 +3368,7 @@ api_tmgio (struct libwr2rf_dev *dev, int argc, char **argv)
} }
lemo = strtoul(argv[1], NULL, 0); lemo = strtoul(argv[1], NULL, 0);
oe = strtoul(argv[2], NULL, 0); oe = strtoul(argv[2], NULL, 0);
term = strtoul(argv[3], NULL, 0); term = strtoul(argv[3], NULL, 0);
if (libwr2rf_configure_tmgio(dev, lemo, oe, term)) if (libwr2rf_configure_tmgio(dev, lemo, oe, term))
...@@ -3366,7 +3394,8 @@ static struct cmds cmds[] = ...@@ -3366,7 +3394,8 @@ static struct cmds cmds[] =
{ "api-dds-ioupdate-delay", api_dds_ioupdate_delay, "Sets the delay from the FPGA for the dds ioupdate signal" }, { "api-dds-ioupdate-delay", api_dds_ioupdate_delay, "Sets the delay from the FPGA for the dds ioupdate signal" },
{ "api-vtu-start-lemo", api_vtu_start_lemo, "select start lemo for a vtu"}, { "api-vtu-start-lemo", api_vtu_start_lemo, "select start lemo for a vtu"},
{ "api-vtu-stop-lemo", api_vtu_stop_lemo, "select stop lemo for a vtu"}, { "api-vtu-stop-lemo", api_vtu_stop_lemo, "select stop lemo for a vtu"},
{ "api-vtu-output-delay", api_vtu_output_delay, "set vtu output delay"}, { "api-vtu-output-ff-delay", api_vtu_output_ff_delay, "set vtu output delay chip value"},
{ "api-vtu-output-pad-delay", api_vtu_output_pad_delay, "set vtu output delay from FPGA to ff"},
{ "api-vtu-output-enable", api_vtu_output_enable, "enable vtu output delay"}, { "api-vtu-output-enable", api_vtu_output_enable, "enable vtu output delay"},
{ "api-vtu-output-shaper", api_vtu_output_shaper, "enable vtu output shaper"}, { "api-vtu-output-shaper", api_vtu_output_shaper, "enable vtu output shaper"},
{ "api-vtu-output-reset", api_vtu_output_reset, "force reset vtu output"}, { "api-vtu-output-reset", api_vtu_output_reset, "force reset vtu output"},
......
...@@ -74,5 +74,20 @@ slot=$1 ...@@ -74,5 +74,20 @@ slot=$1
./wr2rf -s $slot lemo-dbg-sel tmgio3 nco_reset ./wr2rf -s $slot lemo-dbg-sel tmgio3 nco_reset
./wr2rf -s $slot lemo-dbg-sel tmgio4 rf1_frev ./wr2rf -s $slot lemo-dbg-sel tmgio4 rf1_frev
# TIMING DELAYS as observed in 774 lab testing crate - OTHER INSTALLATIONS MAY BE DIFFERENT
# setup the ioupdate delay
./wr2rf -s $slot api-dds-ioupdate-delay 2 10
# setup RF1 sync_in delay to trigger unit 1 - WARNING !!! DEPENDS ON FREQUENCY
# setup RF1 trig1_out delay to external flip-flop
# setup RF1 trig2_out delay to external flip-flop
# setup RF2 sync_in delay to trigger unit 1 - WARNING !!! DEPENDS ON FREQUENCY
# setup RF2 trig1_out delay to external flip-flop
# setup RF2 trig2_out delay to external flip-flop
...@@ -11,17 +11,41 @@ slot=$1 ...@@ -11,17 +11,41 @@ slot=$1
./wr2rf -s $slot api-tmgio 4 1 0 ./wr2rf -s $slot api-tmgio 4 1 0
./wr2rf -s $slot api-tmgclk 1 0 1 ./wr2rf -s $slot api-tmgclk 1 0 1
./wr2rf -s $slot api-tmgclk 2 0 1 ./wr2rf -s $slot api-tmgclk 2 0 1
# TU starts are input on tmg_clk[2:1] # TU starts are input on tmg_clk[2:1]
./wr2rf -s $slot api-vtu-start-lemo 1.1 5 ./wr2rf -s $slot api-vtu-start-lemo 1.1 5
./wr2rf -s $slot api-vtu-start-lemo 1.2 5 ./wr2rf -s $slot api-vtu-start-lemo 1.2 5
./wr2rf -s $slot api-vtu-start-lemo 2.1 6 ./wr2rf -s $slot api-vtu-start-lemo 2.1 6
./wr2rf -s $slot api-vtu-start-lemo 2.2 6 ./wr2rf -s $slot api-vtu-start-lemo 2.2 6
# TU stops are input on tmg_io[2:1] # TU stops are input on tmg_io[2:1]
./wr2rf -s $slot api-vtu-stop-lemo 1.1 1 ./wr2rf -s $slot api-vtu-stop-lemo 1.1 1
./wr2rf -s $slot api-vtu-stop-lemo 1.2 1 ./wr2rf -s $slot api-vtu-stop-lemo 1.2 1
./wr2rf -s $slot api-vtu-stop-lemo 2.1 2 ./wr2rf -s $slot api-vtu-stop-lemo 2.1 2
./wr2rf -s $slot api-vtu-stop-lemo 2.2 2 ./wr2rf -s $slot api-vtu-stop-lemo 2.2 2
# TIMING DELAYS as observed in 774 lab testing crate - OTHER INSTALLATIONS MAY BE DIFFERENT
# setup the ioupdate delay
./wr2rf -s $slot api-dds-ioupdate-delay 2 10
# setup RF1 sync_in delay to trigger unit 1 - WARNING !!! DEPENDS ON FREQUENCY
./wr2rf -s 5 api-nco-reset-delay 1 75 5 0xa
# setup RF1 trig1_out delay to external flip-flop
./wr2rf -s 5 api-vtu-output-pad-delay 1.1 0 0x12
# setup RF1 trig2_out delay to external flip-flop
./wr2rf -s 5 api-vtu-output-pad-delay 1.2 0 0x14
# setup RF2 sync_in delay to trigger unit 1 - WARNING !!! DEPENDS ON FREQUENCY
./wr2rf -s 5 api-nco-reset-delay 2 75 4 0x14
# setup RF2 trig1_out delay to external flip-flop
./wr2rf -s 5 api-vtu-output-pad-delay 2.1 0 0xd
# setup RF2 trig2_out delay to external flip-flop
./wr2rf -s 5 api-vtu-output-pad-delay 2.2 0 0xd
# setup front panel debug signals # setup front panel debug signals
# RF sync signals are output on tmg_io[4:3] # RF sync signals are output on tmg_io[4:3]
#./wr2rf -s $slot api-lemo-dbg-sel tmgio3 nco_reset #./wr2rf -s $slot api-lemo-dbg-sel tmgio3 nco_reset
......
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