Commit 24fbd5e6 authored by Tristan Gingold's avatar Tristan Gingold

tb_vtu: add an observer to the vtu.

parent 348d36b8
......@@ -48,9 +48,27 @@ architecture arch of tb_vtu is
end loop;
return res;
end to_string;
-- Command to be sent to the VTU observer: number of expected pulses.
type observer_type is record
count : natural;
end record;
signal observer_cmd : observer_type;
-- VTU observer state.
type obs_state_type is (IDLE, WORKING, OBS_DONE, OBS_ERR);
signal observer_state : obs_state_type := IDLE;
signal observer_period : time;
begin
-- System clock, 62.5 Mhz
clk_sys <= not clk_sys after 8 ns;
process
begin
clk_sys <= '0';
wait for 8 ns;
clk_sys <= '1';
wait for 8 ns;
end process;
rst_sys <= '1', '0' after 16 ns;
-- RF clock, ~200Mhz (5ns)
......@@ -81,6 +99,49 @@ begin
stop_i => stop
);
-- VTU observer.
process (trig_p, observer_cmd)
variable count : natural;
variable last_ts : time;
variable this_period : time;
begin
if observer_cmd'event then
-- New command
case observer_state is
when IDLE | OBS_DONE | OBS_ERR =>
observer_state <= WORKING;
count := 0;
last_ts := now;
when WORKING =>
report "VTU observer command overrides the previous one" severity error;
end case;
end if;
if trig_p'event and trig_p = '1' then
report "Trigger:" & Natural'image(count);
case observer_state is
when IDLE =>
report "VTU observer: trigger before command" severity error;
when WORKING =>
this_period := now - last_ts;
if count = 1 then
observer_period <= this_period;
elsif count > 1 then
if this_period /= observer_period then
report "VTU observer: irregular period" severity error;
end if;
end if;
last_ts := now;
count := count + 1;
if count = observer_cmd.count then
observer_state <= OBS_DONE;
end if;
when OBS_DONE | OBS_ERR =>
null;
end case;
end if;
end process;
process
variable val : std_logic_vector(15 downto 0);
begin
......@@ -123,6 +184,8 @@ begin
report "config online = " & to_string(val);
assert val = x"0000" severity error;
observer_cmd <= (count => 64);
-- Start pulse.
start <= '1';
wait for 40 ns;
......@@ -179,6 +242,18 @@ begin
read16_pl (clk_sys, wb_in, wb_out, ADDR_TRIGUNIT_REGS_BVALUEONLINE + 6, val);
assert val = x"0020" severity error;
-- Wait until end of generation.
wait on observer_state;
-- Check observer status.
assert observer_state = OBS_DONE severity error;
assert observer_period = 8 * 5 ns;
-- Check VTU status.
read16_pl (clk_sys, wb_in, wb_out, ADDR_TRIGUNIT_REGS_STATUS, val);
report "status = " & to_string(val);
assert val (TRIGUNIT_REGS_STATUS_STARTREADY_OFFSET) = '1' severity error;
assert val (TRIGUNIT_REGS_STATUS_RUNNING_OFFSET) = '0' severity error;
report "end of tests";
wait;
end process;
end arch;
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