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WR2RF timing calibration methodology
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To commission a WR2RF card for operational performance each RF channel and its two trigger units must be observed to be operating well away from metastable sampling points.
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Metastability can enter the system because the White Rabbit clocked nco_reset signal is sampled in the RF clock domain. Then for each trigger unit there is an external flip-flop that resamples the trigger unit output from the FPGA. These trigger unit signals must be delayed to avoid the setup and hold window the external flip-flop.
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The process and methodology is described in the following document.
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[wr2rf_timing_calibration.pdf](uploads/f76091ce01c3b920449f32c7da17e65a/wr2rf_timing_calibration.pdf) |
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