Skip to content

W
White Rabbit Switch - Software
Commit aa4b5b86 authored by Tomasz Wlostowski's avatar Tomasz Wlostowski
Browse files
Options

userspace/wrsw_hal: add halexp_get_timing_state() export, link up detection bugfix

parent e652f6de
Hide whitespace changes
Inline Side-by-side
Showing with 63 additions and 93 deletions
userspace/wrsw_hal/hal_exports.c
View file @ aa4b5b86
...@@ -17,43 +17,6 @@ ...@@ -17,43 +17,6 @@
static struct minipc_ch *hal_ch; static struct minipc_ch *hal_ch;
/* Dummy WRIPC export, used by the clients to check if the HAL is responding */
int halexp_check_running()
{
return 1;
}
/* External synchronization source (i.e. GPS 10 MHz input) control. */
int halexp_extsrc_cmd(int command)
{
int rval;
switch(command)
{
/* There's only one command so far: checking if a valid reference clock is present on the external input
and whether the PLL is locked to the network recovered clock or to the external reference. */
case HEXP_EXTSRC_CMD_CHECK:
rval = hal_extsrc_check_lock();
if(rval > 0)
return HEXP_EXTSRC_STATUS_LOCKED;
else if (!rval)
return HEXP_LOCK_STATUS_BUSY;
else
return HEXP_EXTSRC_STATUS_NOSRC;
break;
}
return -100; /* fixme: add real error code */
}
/* Dummy reset call (used to be a real reset for testing, but it's no longer necessary) */
int halexp_reset_port(const char *port_name)
{
TRACE(TRACE_INFO, "resetting port %s\n", port_name);
return 0;
}
/* Locking call - controls the HAL locking state machine. Called by the PTPd during the WR Link Setup phase, when /* Locking call - controls the HAL locking state machine. Called by the PTPd during the WR Link Setup phase, when
it has detected a compatible WR master. */ it has detected a compatible WR master. */
int halexp_lock_cmd(const char *port_name, int command, int priority) int halexp_lock_cmd(const char *port_name, int command, int priority)
...@@ -94,6 +57,7 @@ int halexp_lock_cmd(const char *port_name, int command, int priority) ...@@ -94,6 +57,7 @@ int halexp_lock_cmd(const char *port_name, int command, int priority)
/* Phase/Clock adjutsment call. Called by the PTPd servo. Controls both the PLLs and the PPS Generator. */ /* Phase/Clock adjutsment call. Called by the PTPd servo. Controls both the PLLs and the PPS Generator. */
int halexp_pps_cmd(int cmd, hexp_pps_params_t *params) int halexp_pps_cmd(int cmd, hexp_pps_params_t *params)
{ {
int busy;
switch(cmd) switch(cmd)
{ {
...@@ -135,18 +99,25 @@ int halexp_pps_cmd(int cmd, hexp_pps_params_t *params) ...@@ -135,18 +99,25 @@ int halexp_pps_cmd(int cmd, hexp_pps_params_t *params)
delay calculation. */ delay calculation. */
case HEXP_PPSG_CMD_POLL: case HEXP_PPSG_CMD_POLL:
return shw_pps_gen_busy(); /* no more dmpll shifter to check */ busy = shw_pps_gen_busy();
// TRACE(TRACE_INFO, "ppsg_busy: %d\n",busy);
return busy ? 0 : 1; /* no more dmpll shifter to check */
} }
return -1; /* fixme: real error code */ return -1; /* fixme: real error code */
} }
/* PLL debug call, foreseen for live adjustment of some internal PLL parameters (gains, timeouts, etc.) extern int any_port_locked();
To be implemented. */
int halexp_pll_cmd(int cmd, hexp_pll_cmd_t *params) int halexp_get_timing_state(hexp_timing_state_t *state)
{ {
return 0; state->timing_mode = hal_get_timing_mode();
state->locked_port = any_port_locked();
return 0;
} }
static void hal_cleanup_wripc() static void hal_cleanup_wripc()
{ {
minipc_close(hal_ch); minipc_close(hal_ch);
...@@ -194,6 +165,12 @@ static int export_query_ports(const struct minipc_pd *pd, ...@@ -194,6 +165,12 @@ static int export_query_ports(const struct minipc_pd *pd,
return 0; return 0;
} }
static int export_get_timing_state(const struct minipc_pd *pd,
uint32_t *args, void *ret)
{
halexp_get_timing_state(ret);
return 0;
}
/* Creates a wripc server and exports all public API functions */ /* Creates a wripc server and exports all public API functions */
int hal_init_wripc() int hal_init_wripc()
...@@ -202,8 +179,10 @@ int hal_init_wripc() ...@@ -202,8 +179,10 @@ int hal_init_wripc()
if(hal_ch < 0) if(hal_ch < 0)
{
TRACE(TRACE_ERROR, "Failed to create mini-rpc server '%s'", WRSW_HAL_SERVER_ADDR);
return -1; return -1;
}
/* NOTE: check_running is not remotely called, so I don't export it */ /* NOTE: check_running is not remotely called, so I don't export it */
/* fill the function pointers */ /* fill the function pointers */
...@@ -211,12 +190,15 @@ int hal_init_wripc() ...@@ -211,12 +190,15 @@ int hal_init_wripc()
__rpcdef_get_port_state.f = export_get_port_state; __rpcdef_get_port_state.f = export_get_port_state;
__rpcdef_lock_cmd.f = export_lock_cmd; __rpcdef_lock_cmd.f = export_lock_cmd;
__rpcdef_query_ports.f = export_query_ports; __rpcdef_query_ports.f = export_query_ports;
__rpcdef_get_timing_state.f = export_get_timing_state;
minipc_export(hal_ch, &__rpcdef_pps_cmd); minipc_export(hal_ch, &__rpcdef_pps_cmd);
minipc_export(hal_ch, &__rpcdef_get_port_state); minipc_export(hal_ch, &__rpcdef_get_port_state);
minipc_export(hal_ch, &__rpcdef_lock_cmd); minipc_export(hal_ch, &__rpcdef_lock_cmd);
minipc_export(hal_ch, &__rpcdef_query_ports); minipc_export(hal_ch, &__rpcdef_query_ports);
minipc_export(hal_ch, &__rpcdef_get_timing_state);
/* FIXME: pll_cmd is empty anyways???? */ /* FIXME: pll_cmd is empty anyways???? */
hal_add_cleanup_callback(hal_cleanup_wripc); hal_add_cleanup_callback(hal_cleanup_wripc);
......
userspace/wrsw_hal/hal_exports.h
View file @ aa4b5b86
...@@ -34,7 +34,7 @@ ...@@ -34,7 +34,7 @@
#define HEXP_PPSG_CMD_GET 0 #define HEXP_PPSG_CMD_GET 0
#define HEXP_PPSG_CMD_ADJUST_PHASE 1 #define HEXP_PPSG_CMD_ADJUST_PHASE 1
#define HEXP_PPSG_CMD_ADJUST_UTC 2 #define HEXP_PPSG_CMD_ADJUST_UTC 2
#define HEXP_PPSG_CMD_ADJUST_NSEC 3 #define HEXP_PPSG_CMD_ADJUST_NSEC 3
#define HEXP_PPSG_CMD_POLL 4 #define HEXP_PPSG_CMD_POLL 4
...@@ -50,11 +50,17 @@ ...@@ -50,11 +50,17 @@
/////////////////added by ML////////// /////////////////added by ML//////////
#define HEXP_EXTSRC_CMD_CHECK 0 #define HEXP_EXTSRC_CMD_CHECK 0
#define HEXP_EXTSRC_STATUS_LOCKED 0 #define HEXP_EXTSRC_STATUS_LOCKED 0
#define HEXP_LOCK_STATUS_BUSY 1 #define HEXP_LOCK_STATUS_BUSY 1
#define HEXP_EXTSRC_STATUS_NOSRC 2 #define HEXP_EXTSRC_STATUS_NOSRC 2
///////////////////////////////////// /////////////////////////////////////
#define HAL_TIMING_MODE_GRAND_MASTER 0
#define HAL_TIMING_MODE_FREE_MASTER 1
#define HAL_TIMING_MODE_BC 2
typedef struct { typedef struct {
char port_name[16]; char port_name[16];
...@@ -64,10 +70,10 @@ typedef struct { ...@@ -64,10 +70,10 @@ typedef struct {
int64_t adjust_utc; int64_t adjust_utc;
int32_t adjust_nsec; int32_t adjust_nsec;
uint64_t current_utc; uint64_t current_utc;
uint32_t current_nsec; uint32_t current_nsec;
} hexp_pps_params_t; } hexp_pps_params_t;
/* Port modes (hexp_port_state_t.mode) */ /* Port modes (hexp_port_state_t.mode) */
...@@ -93,7 +99,7 @@ typedef struct { ...@@ -93,7 +99,7 @@ typedef struct {
/* TX and RX delays (combined, big Deltas from the link model in the spec) */ /* TX and RX delays (combined, big Deltas from the link model in the spec) */
uint32_t delta_tx; uint32_t delta_tx;
uint32_t delta_rx; uint32_t delta_rx;
/* DDMTD raw phase value in picoseconds */ /* DDMTD raw phase value in picoseconds */
uint32_t phase_val; uint32_t phase_val;
...@@ -134,11 +140,10 @@ typedef struct { ...@@ -134,11 +140,10 @@ typedef struct {
} hexp_port_list_t; } hexp_port_list_t;
typedef struct { typedef struct {
int ki, kp; int timing_mode; /* Free-running Master/GM/BC */
int pll; int locked_port;
int branch;
} hexp_pll_cmd_t; } hexp_timing_state_t;
/* Prototypes of functions that call on rpc */ /* Prototypes of functions that call on rpc */
extern int halexp_check_running(void); extern int halexp_check_running(void);
...@@ -148,8 +153,7 @@ extern int halexp_lock_cmd(const char *port_name, int command, int priority); ...@@ -148,8 +153,7 @@ extern int halexp_lock_cmd(const char *port_name, int command, int priority);
extern int halexp_query_ports(hexp_port_list_t *list); extern int halexp_query_ports(hexp_port_list_t *list);
extern int halexp_get_port_state(hexp_port_state_t *state, const char *port_name); extern int halexp_get_port_state(hexp_port_state_t *state, const char *port_name);
extern int halexp_pps_cmd(int cmd, hexp_pps_params_t *params); extern int halexp_pps_cmd(int cmd, hexp_pps_params_t *params);
extern int halexp_pll_set_gain(int pll, int branch, int kp, int ki); extern int halexp_get_timing_state(hexp_timing_state_t *state);
extern int halexp_extsrc_cmd(int command); //added by ML
/* Export structures, shared by server and client for argument matching */ /* Export structures, shared by server and client for argument matching */
...@@ -228,25 +232,10 @@ struct minipc_pd __rpcdef_pps_cmd = { ...@@ -228,25 +232,10 @@ struct minipc_pd __rpcdef_pps_cmd = {
}, },
}; };
//int halexp_pll_set_gain(int pll, int branch, int kp, int ki); struct minipc_pd __rpcdef_get_timing_state = {
struct minipc_pd __rpcdef_pll_set_gain = { .name = "get_timing_state",
.name = "pll_set_gain", .retval = MINIPC_ARG_ENCODE(MINIPC_ATYPE_STRUCT, hexp_timing_state_t),
.retval = MINIPC_ARG_ENCODE(MINIPC_ATYPE_INT, int),
.args = {
MINIPC_ARG_ENCODE(MINIPC_ATYPE_INT, int),
MINIPC_ARG_ENCODE(MINIPC_ATYPE_INT, int),
MINIPC_ARG_ENCODE(MINIPC_ATYPE_INT, int),
MINIPC_ARG_ENCODE(MINIPC_ATYPE_INT, int),
MINIPC_ARG_END,
},
};
//int halexp_extsrc_cmd(int command); //added by ML
struct minipc_pd __rpcdef_extsrc_cmd = {
.name = "extsrc_cmd",
.retval = MINIPC_ARG_ENCODE(MINIPC_ATYPE_INT, int),
.args = { .args = {
MINIPC_ARG_ENCODE(MINIPC_ATYPE_INT, int),
MINIPC_ARG_END, MINIPC_ARG_END,
}, },
}; };
......
userspace/wrsw_hal/hal_main.c
View file @ aa4b5b86
...@@ -188,13 +188,11 @@ int hal_init() ...@@ -188,13 +188,11 @@ int hal_init()
assert_init(hal_init_timing()); assert_init(hal_init_timing());
/* Initialize port FSMs - see hal_ports.c */
assert_init(hal_init_ports());
/* Create a WRIPC server for HAL public API */ /* Create a WRIPC server for HAL public API */
assert_init(hal_init_wripc()); assert_init(hal_init_wripc());
/* Initialize port FSMs - see hal_ports.c */
assert_init(hal_init_ports());
return 0; return 0;
} }
...@@ -205,7 +203,7 @@ void hal_update() ...@@ -205,7 +203,7 @@ void hal_update()
hal_update_wripc(); hal_update_wripc();
hal_update_ports(); hal_update_ports();
usleep(1000); // usleep(1000);
} }
/* Turns a nice and well-behaving HAL into an evil servant of satan. */ /* Turns a nice and well-behaving HAL into an evil servant of satan. */
......
userspace/wrsw_hal/hal_ports.c
View file @ aa4b5b86
...@@ -118,6 +118,14 @@ static int rts_state_valid = 0; ...@@ -118,6 +118,14 @@ static int rts_state_valid = 0;
static timeout_t tmo_rts, tmo_sfp; static timeout_t tmo_rts, tmo_sfp;
static int num_physical_ports; static int num_physical_ports;
int any_port_locked()
{
if(!rts_state_valid) return -1;
if(rts_state.current_ref == REF_NONE) return -1;
return rts_state.current_ref;
}
/* generates a unique MAC address for port if_name (currently produced from the MAC of the /* generates a unique MAC address for port if_name (currently produced from the MAC of the
management port). */ management port). */
/* FIXME: MAC addresses should be kept in some EEPROM */ /* FIXME: MAC addresses should be kept in some EEPROM */
...@@ -502,7 +510,7 @@ static void on_insert_sfp(hal_port_state_t *p) ...@@ -502,7 +510,7 @@ static void on_insert_sfp(hal_port_state_t *p)
TRACE(TRACE_INFO, "SFP Info: (%s) deltaTx %d delta Rx %d alpha %.3f (* 1e6)", TRACE(TRACE_INFO, "SFP Info: (%s) deltaTx %d delta Rx %d alpha %.3f (* 1e6)",
cdata->flags & SFP_FLAG_CLASS_DATA ? "class-specific" : "device-specific", cdata->flags & SFP_FLAG_CLASS_DATA ? "class-specific" : "device-specific",
cdata->delta_tx, cdata->delta_rx, cdata->alpha * 1e6); cdata->delta_tx, cdata->delta_rx, cdata->alpha * 1e6);
memcpy(&p->calib.sfp, cdata, sizeof(struct shw_sfp_caldata)); memcpy(&p->calib.sfp, cdata, sizeof(struct shw_sfp_caldata));
} else { } else {
TRACE(TRACE_ERROR, "WARNING! SFP on port %s is NOT registered in the DB (using default delta & alpha values). This may cause severe timing performance degradation!", p->name); TRACE(TRACE_ERROR, "WARNING! SFP on port %s is NOT registered in the DB (using default delta & alpha values). This may cause severe timing performance degradation!", p->name);
...@@ -629,7 +637,8 @@ int halexp_get_port_state(hexp_port_state_t *state, const char *port_name) ...@@ -629,7 +637,8 @@ int halexp_get_port_state(hexp_port_state_t *state, const char *port_name)
state->valid = 1; state->valid = 1;
state->mode = p->mode; state->mode = p->mode;
state->up = p->state != HAL_PORT_STATE_LINK_DOWN; state->up = (p->state != HAL_PORT_STATE_LINK_DOWN && p->state != HAL_PORT_STATE_DISABLED);
state->is_locked = p->lock_state == LOCK_STATE_LOCKED; state->is_locked = p->lock_state == LOCK_STATE_LOCKED;
state->phase_val = p->phase_val; state->phase_val = p->phase_val;
state->phase_val_valid = p->phase_val_valid; state->phase_val_valid = p->phase_val_valid;
...@@ -685,11 +694,6 @@ int halexp_query_ports(hexp_port_list_t *list) ...@@ -685,11 +694,6 @@ int halexp_query_ports(hexp_port_list_t *list)
/* Maciek's ptpx export for checking the presence of the external 10 MHz ref clock */ /* Maciek's ptpx export for checking the presence of the external 10 MHz ref clock */
int hal_extsrc_check_lock() int hal_extsrc_check_lock()
{ {
return -1; return (hal_get_timing_mode() != HAL_TIMING_MODE_BC) ? 1 : 0;
/*
return -1; //<0 - there is no external source lock
return 1; //>0 - we are locked to an external source
return 0; //=0 - HW problem, wait
*/
} }
userspace/wrsw_hal/hal_timing.c
View file @ aa4b5b86
...@@ -10,6 +10,7 @@ ...@@ -10,6 +10,7 @@
#include "wrsw_hal.h" #include "wrsw_hal.h"
#include "timeout.h" #include "timeout.h"
#include "rt_ipc.h" #include "rt_ipc.h"
#include "hal_exports.h"
static int timing_mode; static int timing_mode;
......
userspace/wrsw_hal/wrsw_hal.h
View file @ aa4b5b86
...@@ -7,16 +7,12 @@ ...@@ -7,16 +7,12 @@
typedef void (*hal_cleanup_callback_t)(); typedef void (*hal_cleanup_callback_t)();
#define HAL_TIMING_MODE_GRAND_MASTER 0
#define HAL_TIMING_MODE_FREE_MASTER 1
#define HAL_TIMING_MODE_BC 2
#define PORT_BUSY 1 #define PORT_BUSY 1
#define PORT_OK 0 #define PORT_OK 0
#define PORT_ERROR -1 #define PORT_ERROR -1
#define DEFAULT_T2_PHASE_TRANS 6000 #define DEFAULT_T2_PHASE_TRANS 0
#define DEFAULT_T4_PHASE_TRANS 6000 #define DEFAULT_T4_PHASE_TRANS 0
#define REF_CLOCK_PERIOD_PS 16000 #define REF_CLOCK_PERIOD_PS 16000
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment