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Benoit Rat authored
By doing this we ensure to have started locking the GM mode (wr_date check for soft pll shmem). And we have properly set FPGA time and leap second before starting ppsi
54546c2a
By doing this we ensure to have started locking the GM mode (wr_date check for soft pll shmem). And we have properly set FPGA time and leap second before starting ppsi