... | ... | @@ -15,6 +15,25 @@ Please attach a txt or add your comments directly |
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- GregK
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- SCH
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- some designators are rotated (I know, there is an option in settings)
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- enable PN view of ICs, like ESD7016MUTAG
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- are you sure ESD7016MUTAG would work here? It's clamping voltage is far too high to protect the FPGA bank
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- I'd use unipolar TVS for FMC status lines instead of PESD3V3L1BA
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- LMX2594RHAT is hard to get
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- we have TR2, Tr3, TR4, don't we want to use galvanic isolation (ground loop removal)
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- I miss annotation about power level at P5 input
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- L74, L76, L75, L77 CMC windings are connected in parallel. That won't work. CMCs are very fragile to current impalance. To make them work, use common ferrite core or multi-windong CMCs
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- what's the purpose of IC49? Are we going to connect any other PSU?
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- please add annotation about fan PN, I cannot verify the connector wiring
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- add series 4k7 protection resistor in series with FANx_PRESENT input, We don't want FPGA damage when somebody inserts fan with different wiring
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- I'd connect D26 pin 5 to 3V3 and add series PWM input resistors. We don't want fan controller damage when somebody inserts fan with different wiring
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- isn the voltage rail nomenclature correct? P3AV3 looks weird, don't we use P3V3A in all OHWR designs?
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- SFP I2C interface is not protected with TVS while the MGT IFC is.
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- connect D5, D6 pin 5 to 3V3. It would lower the clamping voltage
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- USBC requires 5k1 pulldown resistors on CC lines to work as USB device
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https://www.allaboutcircuits.com/technical-articles/introduction-to-usb-type-c-which-pins-power-delivery-data-transfer/
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- why SATA? PCIe SSDs are much faster, the M2 keying is different. I miss annotation about M2 keying
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