| ... | ... | @@ -20,7 +20,7 @@ project](https://www.ohwr.org/project/white-rabbit/wiki). |
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## Project information
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- [Preliminary study of input from the WR community, CERN IT](https://ohwr.org/project/wr-switch-hw-v4/wikis/Features-choice)
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- [In-depth study of WRS-v4/18 features](uploads/8df374029c4b2a3cc025a59a72edce55/WRS-v4-hw-study.pdf) by SevenSolutions:
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- [In-depth study of WRS-4 features](uploads/8df374029c4b2a3cc025a59a72edce55/WRS-v4-hw-study.pdf) by SevenSolutions:
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- [Analysis of resource utilization for the candidate FPGA choice](uploads/31c7019f3c24cb12ec0f8c79c108af59/WRS-v4-resource-utilization.pdf) by Creotech
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- [Frequently Asked Questions](faq)
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| ... | ... | @@ -31,8 +31,8 @@ project](https://www.ohwr.org/project/white-rabbit/wiki). |
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|**Completion**|**Task**|**Deliverable**|**Status**|
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|---------------|--------|---------------|-------|
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|2020: <br /> end March |Study of features, components,<br /> requirements, FPGA/CPU choice - WP1, WP2 | Docs: "Study of WRS-v4/18 features" and <br /> [Analysis of FPGA resource utilization](uploads/31c7019f3c24cb12ec0f8c79c108af59/WRS-v4-resource-utilization.pdf) | Completed |
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|2020:<br /> end May | 1. Proposal of WRS-v4/18 main board architecture - WP3 <br /> 2. Verification of 1Gb and 10Gb transceiver - WP4 | 1. Doc:"Proposal of WRS-v4/18 arch"<br /> 2. Demo/prototype | Ongoing|
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|2020: <br /> end March |Study of features, components,<br /> requirements, FPGA/CPU choice - WP1, WP2 | Docs: "Study of WRS-v4 features" and <br /> [Analysis of FPGA resource utilization](uploads/31c7019f3c24cb12ec0f8c79c108af59/WRS-v4-resource-utilization.pdf) | Completed |
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|2020:<br /> end May | 1. Proposal of WRS-v4 main board architecture - WP3 <br /> 2. Verification of 1Gb and 10Gb transceiver - WP4 | 1. Doc:"Proposal of WRS-v4 arch"<br /> 2. Demo/prototype | Ongoing|
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|2020: <br />June | Request for feedback from WR community | |
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|2020: <br />end July | Update of study/proposal documents | Updated documents | |
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|2020: <br />end Dec. | 1. Schematics design - WP5 <br /> 2. PCB layout design (DEM) - WP6 <br /> 3. Enclosure design -WP7 <br /> 4. Proper WR support for GTH - WP8| 1 & 2. Prototypes of PCB <br /> 3. Prototype of enclosure <br /> 4. Release of WR cores| |
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| ... | ... | @@ -49,9 +49,9 @@ project](https://www.ohwr.org/project/white-rabbit/wiki). |
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|**WP**|**Task**|**Company**|**Status**|
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|-------|--------|-----------|-------|
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|1| Study of WRS-v4/18 features | Seven Solutions | Completed
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|1| Study of WRS-4 features | Seven Solutions | Completed
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|2| Analysis of FPGA resource utilization | Creotech | Competed |
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|3| Proposal of WRS-v4/18 main board architecture | Seven Solutions | Ongoing |
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|3| Proposal of WRS-4 main board architecture | Seven Solutions | Ongoing |
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|4| Verification of 1Gb and 10Gb transceiver | CERN | Ongoing |
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|5| Schematics design | | |
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|6| PCB layout design (DEM) | CERN | |
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| ... | ... | |
