P1 bringup: USB UART / FTDI interface
The Tx/Rx of the UARTs are swapped. We can change this easily in the FPGA but the PS UART is hardwired.
Further, the PL UART is not currently accessible. When channel A is configured in JTAG mode, the PL UART connects to GPIOH0/GPIOH1. To access this we need to write a custom configuration for the FTDI. If we were to configure this channel in UART/RS232 mode, the pinout is incorrect.
For now we can mod the boards to connect the PL_UART to the correct pins on channel A for UART mode and remove the JTAG functionality (there is already a JTAG connector on the board). Otherwise we could change to the FT4232H, looks like the LQFP-64 package is pin compatible would work with the current connections on the board (with Tx/Rx corrected).