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White Rabbit Switch - Gateware
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White Rabbit Switch - Gateware
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b5489272
Commit
b5489272
authored
Dec 20, 2016
by
Mattia Rizzi
Committed by
Grzegorz Daniluk
Aug 09, 2019
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Modified synthesis configuration for 18ports build
parent
7d9971a2
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Runtime Reduction with Multi-Threading.xds
syn/scb_8ports/Runtime Reduction with Multi-Threading.xds
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b5489272
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<DesignStrategy
goal=
"Minimum Runtime"
strategy=
"Runtime Reduction with Multi-Threading"
version=
"12.1"
>
<Description>
This strategy will minimize runtime. This strategy will not optimize for timing performance.
</Description>
<DeviceList
devices=
"virtex6"
/>
<Properties>
<property
name=
"Synthesize - XST:Read Cores"
value=
"false"
/>
<property
name=
"Map:Placer Effort Level"
value=
"High"
/>
<property
name=
"Map:Placer Extra Effort"
value=
"Normal"
/>
<property
name=
"Map:Starting Placer Cost Table (1-100)"
value=
"40"
/>
<property
name=
"Map:Timing Mode"
value=
"Performance Evaluation"
/>
<property
name=
"Map:Pack I/O Registers/Latches into IOBs"
value=
"For Outputs Only"
/>
<property
name=
"Map:LUT Combining"
value=
"Auto"
/>
<property
name=
"Map:Power Reduction"
value=
"Off"
/>
<property
name=
"Map:Enable Multi-Threading"
value=
"2"
/>
<property
name=
"Place & Route:Place & Route Effort Level (Overall)"
value=
"High"
/>
<property
name=
"Place & Route:Timing Mode"
value=
"Performance Evaluation"
/>
<property
name=
"Place & Route:Enable Multi-Threading"
value=
"4"
/>
<property
name=
"Generate Programming File:Create Bit File"
value=
"true"
/>
<property
name=
"Generate Programming File:Create Binary Configuration File"
value=
"true"
/>
</Properties>
</DesignStrategy>
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