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White Rabbit Switch - Gateware
Commit 378f2311 authored by Konstantinos Blantos's avatar Konstantinos Blantos
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Update .gitlab-ci.yml

parent 51732bf3
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.gitlab-ci.yml
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......@@ -2,42 +2,37 @@ variables:
GIT_SUBMODULE_STRATEGY: normal
stages:
# - compile
# - sim
- syn
- compile
- sim
# - syn
#job_scb_top_8p_compile:
# stage: compile
# tags:
# - modelsim_102a
# image:
# name: sha256:6e3ea27ad797017d0dcaaf160ba75a4df1a8660a9b93a90d16152dd88794b730
# entrypoint: ["/entrypoint.sh"]
# script:
# - source ~/setup_modelsim.sh
# - cd testbench/scb_top_8p; hdlmake makefile; make clean; make
job_scb_top_8p_compile:
stage: compile
tags:
- modelsim_10.2a
script:
- /entrypoint.sh
- source ~/setup_modelsim.sh
- cd testbench/scb_top_8p; hdlmake makefile; make clean; make
#job_scb_top_8p_sim:
# stage: sim
# tags:
# - modelsim_102a
# image:
# name: sha256:6e3ea27ad797017d0dcaaf160ba75a4df1a8660a9b93a90d16152dd88794b730
# entrypoint: ["/entrypoint.sh"]
# script:
# - source ~/setup_modelsim.sh
# - apt-get install -y python
# - cd top/bare_top
# - python gen_sdbsyn.py --project wr_switch
# - cat synthesis_descriptor.vhd
# - cd ../../
# - cd sim
# - ln -s ../ip_cores/wr-cores/sim wr-hdl
# - cd ../testbench/scb_top_8p
# - cp /opt/compiled_libs_ise14.7/modelsim.ini .
# - pwd
# - hdlmake makefile
# - make
job_scb_top_8p_sim:
stage: sim
tags:
- modelsim_10.2a
script:
- /entrypoint.sh
- source ~/setup_modelsim.sh
- apt-get install -y python
- cd top/bare_top
- python gen_sdbsyn.py --project wr_switch
- cat synthesis_descriptor.vhd
- cd ../../
- cd sim
- ln -s ../ip_cores/wr-cores/sim wr-hdl
- cd ../testbench/scb_top_8p
- cp /opt/compiled_libs_ise14.7/modelsim.ini .
- hdlmake makefile
- make
#job_scb_top_8p_syn:
# stage: syn
......
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