Commit 212fb857 authored by Konstantinos Blantos's avatar Konstantinos Blantos Committed by Adam Wujek

Update scb_top_sim.vhd so as to add missing and non-used port signals in order…

Update scb_top_sim.vhd so as to add missing and non-used port signals in order simulator doesn't complain
parent f162799f
......@@ -189,8 +189,8 @@ begin -- rtl
clk_dmtd_i => clk_dmtd_i,
-- clk_sys_i => clk_sys_i,
clk_aux_i => clk_aux_i,
clk_ext_mul_i => '0',
clk_ext_mul_locked_i=> '1',
clk_ext_mul_i => (others=>'0'),
clk_ext_mul_locked_i=> (others=>'1'),
cpu_wb_i => cpu_wb_in,
cpu_wb_o => cpu_wb_out,
cpu_irq_n_o => cpu_irq_n,
......@@ -224,7 +224,11 @@ begin -- rtl
i2c_scl_i => i2c_scl_in,
i2c_sda_oen_o => i2c_sda_oen,
i2c_sda_o => i2c_sda_out,
i2c_sda_i => i2c_sda_in
i2c_sda_i => i2c_sda_in,
ljd_loopback_i => open,
ljd_osc_freq_i => open,
ljd_pll_miso_i => open,
ljd_pll_locked_i=> open
);
gen_phys : for i in 0 to g_num_ports-1 generate
......
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