[swcore/mulit_alloc] removing random slowing down of alloc arbitere

1fe6cd58 · Maciej Lipinski · d6adcb9c · 1fe6cd58
Commit 1fe6cd58 authored Feb 20, 2014 by Maciej Lipinski
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Showing with 22 additions and 22 deletions

swc_multiport_page_allocator.vhd .../optimized_new_allocator/swc_multiport_page_allocator.vhd +22 -22

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--- a/modules/wrsw_swcore/optimized_new_allocator/swc_multiport_page_allocator.vhd
+++ b/modules/wrsw_swcore/optimized_new_allocator/swc_multiport_page_allocator.vhd
@@ -402,37 +402,37 @@ begin  -- syn
  end process;


--   p_arbitrate : process(clk_i)
--   begin
--     if rising_edge(clk_i) then
--       if rst_n_i = '0'then
--         arb_grant <= (others => '0');
--       else
--         f_rr_arbitrate(arb_req, arb_grant, arb_grant);
--       end if;
--     end if;
--   end process;
-
- p_arbitrate : process(clk_i)
-    variable seed1, seed2 : positive;   -- Seed values for random generator
-    variable rand         : real;  -- Random real-number value in range 0 to 1.0
+  p_arbitrate : process(clk_i)
  begin
    if rising_edge(clk_i) then
      if rst_n_i = '0'then
        arb_grant <= (others => '0');
      else
-        UNIFORM(seed1, seed2, rand);
-
-        if(rand < 0.05) then
-          f_rr_arbitrate(arb_req, arb_grant, arb_grant);
-        else
-          arb_grant <= (others => '0');
-        end if;
-        
+        f_rr_arbitrate(arb_req, arb_grant, arb_grant);
      end if;
    end if;
  end process;

+--  p_arbitrate : process(clk_i)
+--     variable seed1, seed2 : positive;   -- Seed values for random generator
+--     variable rand         : real;  -- Random real-number value in range 0 to 1.0
+--   begin
+--     if rising_edge(clk_i) then
+--       if rst_n_i = '0'then
+--         arb_grant <= (others => '0');
+--       else
+--         UNIFORM(seed1, seed2, rand);
+-- 
+--         if(rand < 0.05) then
+--           f_rr_arbitrate(arb_req, arb_grant, arb_grant);
+--         else
+--           arb_grant <= (others => '0');
+--         end if;
+--         
+--       end if;
+--     end if;
+--   end process;
+
  p_req_vec_reg : process(clk_i)
  begin
    if rising_edge(clk_i) then