wr_core_demo: SFP_TX_FAULT_i mapped to wrong pin
On branch "wrpc-v3.0", in file "top/spec_1_1/wr_core_demo/spec_top.ucf", top-level signal "SFP_TX_FAULT_i" is mapped to FPGA pin A17, while according to SPEC schematics (EDA-02189-V4-0, page 5) it should be mapped to FPGA pin B18.