Commit c2f6d4a4 authored by Pascal Bos's avatar Pascal Bos

fixed confilcts

parents 0d019253 7180fa4c
......@@ -47,8 +47,13 @@ set_property IOSTANDARD LVCMOS25 [get_ports dac_dmtd_sclk_o]
create_clock -period 33.333 -name dac_dmtd_sclk_o -waveform {0.000 16.667} [get_ports dac_dmtd_sclk_o]
<<<<<<< HEAD
#set_property PACKAGE_PIN G12 [get_ports areset_i]
#set_property IOSTANDARD LVCMOS25 [get_ports areset_i]
=======
set_property PACKAGE_PIN G12 [get_ports areset_i]
set_property IOSTANDARD LVCMOS25 [get_ports areset_i]
>>>>>>> 7180fa4c971e0b4efea037c38ccc25415ffa23b6
set_property PACKAGE_PIN D27 [get_ports clk_20m_vcxo_n_i]
#set_property IOSTANDARD LVDS_25 [get_ports clk_20m_vcxo_n_i]
......
......@@ -76,7 +76,6 @@ package wr_kc705_pkg is
rst_ref_62m5_n_o : out std_logic;
pci_clk_i : in std_logic;
dac_refclk_cs_n_o : out std_logic;
dac_refclk_sclk_o : out std_logic;
dac_refclk_din_o : out std_logic;
......@@ -289,5 +288,4 @@ component wrc_board_kc705 is
end component ;
end wr_kc705_pkg;
......@@ -106,7 +106,6 @@ entity xwrc_board_kc705 is
pci_clk_i : in std_logic;
---------------------------------------------------------------------------
-- Shared SPI interface to DACs
---------------------------------------------------------------------------
......@@ -266,7 +265,7 @@ architecture struct of xwrc_board_kc705 is
signal clk_pll_dmtd : std_logic;
signal pll_locked : std_logic;
signal clk_10m_ext : std_logic;
-- Reset logic
signal areset_edge_ppulse : std_logic;
signal rst_62m5_n : std_logic;
......@@ -477,6 +476,8 @@ begin -- architecture struct
uart_txd_o => uart_txd_o,
wb_slave_o => wb_slave_o,
wb_slave_i => wb_slave_i,
aux_master_o => open,
aux_master_i => cc_dummy_master_in,
owr_pwren_o => open,
owr_en_o => onewire_en,
owr_i => onewire_in,
......
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