Skip to content

W
White Rabbit core collection
Commit ad82fffb authored by Peter Jansweijer's avatar Peter Jansweijer
Browse files
Options

spec7_ref_design: LED[0] <= led_pps_o 

spec7_write_design: harmonize led_pps name
parent afb2999f
Hide whitespace changes
Inline Side-by-side
Showing with 11 additions and 7 deletions
top/spec7_ref_design/spec7_wr_ref_top.vhd
View file @ ad82fffb
......@@ -201,6 +201,7 @@ entity spec7_wr_ref_top is
-- blink 1-PPS.
dio_led_top_o : out std_logic;
dio_led_bot_o : out std_logic;
led_pps_o : out std_logic;
---------------------------------------------------------------------------
-- EEPROM interface
......@@ -280,6 +281,7 @@ architecture top of spec7_wr_ref_top is
signal wrc_abscal_rxts_out : std_logic;
signal wrc_pps_out : std_logic;
signal wrc_pps_led : std_logic;
signal pps_led_ext : std_logic;
signal wrc_pps_in : std_logic;
signal svec_led : std_logic_vector(15 downto 0);
......@@ -561,8 +563,10 @@ begin -- architecture top
clk_i => clk_ref_62m5,
rst_n_i => rst_ref_62m5_n,
pulse_i => wrc_pps_led,
extended_o => dio_led_top_o);
extended_o => pps_led_ext);
led_pps_o <= pps_led_ext;
dio_led_top_o <= pps_led_ext;
dio_led_bot_o <= '0';
end architecture top;
top/spec7_ref_design/spec7_wr_ref_top.xdc
View file @ ad82fffb
......@@ -162,8 +162,8 @@ set_property IOSTANDARD LVCMOS25 [get_ports led_link_o]
set_property PACKAGE_PIN AB25 [get_ports led_act_o]
set_property IOSTANDARD LVCMOS25 [get_ports led_act_o]
# LED_0
#set_property PACKAGE_PIN AC26 [get_ports led_pps]
#set_property IOSTANDARD LVCMOS25 [get_ports led_pps]
set_property PACKAGE_PIN AC26 [get_ports led_pps_o]
set_property IOSTANDARD LVCMOS25 [get_ports led_pps_o]
# LED_1
#set_property PACKAGE_PIN AB26 [get_ports led_1]
#set_property IOSTANDARD LVCMOS25 [get_ports led_1]
......
top/spec7_write_design/spec7_write_top.vhd
View file @ ad82fffb
......@@ -175,7 +175,7 @@ entity spec7_write_top is
pps_i : in std_logic;
-- blink 1-PPS.
led_pps : out std_logic;
led_pps_o : out std_logic;
---------------------------------------------------------------------------
-- EEPROM interface
......@@ -587,6 +587,6 @@ AXI2WB : xwb_axi4lite_bridge
clk_i => clk_ref_62m5,
rst_n_i => rst_ref_62m5_n,
pulse_i => wrc_pps_led,
extended_o => led_pps);
extended_o => led_pps_o);
end architecture top;
top/spec7_write_design/spec7_write_top.xdc
View file @ ad82fffb
......@@ -169,8 +169,8 @@ set_property IOSTANDARD LVCMOS25 [get_ports led_link_o]
set_property PACKAGE_PIN AB25 [get_ports led_act_o]
set_property IOSTANDARD LVCMOS25 [get_ports led_act_o]
# LED_0
set_property PACKAGE_PIN AC26 [get_ports led_pps]
set_property IOSTANDARD LVCMOS25 [get_ports led_pps]
set_property PACKAGE_PIN AC26 [get_ports led_pps_o]
set_property IOSTANDARD LVCMOS25 [get_ports led_pps_o]
# LED_1
#set_property PACKAGE_PIN AB26 [get_ports led_1]
#set_property IOSTANDARD LVCMOS25 [get_ports led_1]
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment