[Virtex5 support] added chipscope for Virtex 5

Note that on VXS switch, the last device (id 2) has address width 8 bits (this is needed to be inputed correctly when asked by chipscope)

[Virtex5 support] added chipscope for Virtex 5
Note that on VXS switch, the last device (id 2) has address width 8 bits (this is needed to be inputed correctly when asked by chipscope)
9b302f9c · Maciej Lipinski · b00bb129 · 9b302f9c · 9b302f9c · 9b302f9c
Commit 9b302f9c authored Sep 06, 2018 by Maciej Lipinski
3 changed files
--- a/platform/xilinx/chipscope/Manifest.py
+++ b/platform/xilinx/chipscope/Manifest.py
-files =["chipscope_icon.ngc",  "chipscope_ila.ngc" ]
+files =["chipscope_icon.ngc",
+        "chipscope_ila.ngc",
+        "chipscope_virtex5_icon.ngc",
+        "chipscope_virtex5_ila.ngc" ]
--- a/platform/xilinx/chipscope/chipscope_virtex5_icon.ngc
+++ b/platform/xilinx/chipscope/chipscope_virtex5_icon.ngc
--- a/platform/xilinx/chipscope/chipscope_virtex5_ila.ngc
+++ b/platform/xilinx/chipscope/chipscope_virtex5_ila.ngc