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White Rabbit core collection
Commit 7955995d authored by Mathias Kreider's avatar Mathias Kreider
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moved Exploder to GSI bel_projects@github

parent f2a6f970
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syn/gsi_exploder/wr_core_demo/Makefile deleted 100644 → 0
View file @ f2a6f970
TARGET = exploder_top
DEVICE = EP2AGX125
FLASH = EPCS128
QUARTUS ?= /opt/quartus
QUARTUS_BIN = $(QUARTUS)/bin
all: $(TARGET).sof $(TARGET).jic $(TARGET).rpd
clean:
rm -rf db incremental_db PLLJ_PLLSPE_INFO.txt
rm -f $(TARGET).*.rpt $(TARGET).*.summary $(TARGET).map* $(TARGET).fit.* $(TARGET).pin $(TARGET).jdi $(TARGET)*.qdf $(TARGET).done $(TARGET).qws
rm -f $(TARGET).rpd $(TARGET).jic $(TARGET).pof $(TARGET).sof $(TARGET).dep
%.sof: %.qsf
hdlmake --quartus-proj -v | sed -n -e 's/ *$$/:/;s/^.* Parsing manifest file: *//p' > $*.dep
sed -n -e 's/"//g;s/quartus_sh://;s/$$/:/;s/set_global_assignment.*-name.*_FILE //p' < $< >> $*.dep
echo "$*.sof $@: $< " `sed 's/ *: *$$//' < $*.dep` >> $*.dep
$(QUARTUS_BIN)/quartus_sh --tcl_eval load_package flow \; project_open $* \; execute_flow -compile
%.opt: %.sof
echo "BITSTREAM_COMPRESSION=ON" > $@
%.jic: %.sof %.opt
$(QUARTUS_BIN)/quartus_cpf -c -o $*.opt -d $(FLASH) -s $(DEVICE) $< $@
%.pof: %.sof %.opt
$(QUARTUS_BIN)/quartus_cpf -c -o $*.opt -d $(FLASH) $< $@
%.rpd: %.pof
$(QUARTUS_BIN)/quartus_cpf -c -o $*.opt $< $@
-include $(TARGET).dep
syn/gsi_exploder/wr_core_demo/Manifest.py deleted 100644 → 0
View file @ f2a6f970
target = "altera"
action = "synthesis"
fetchto = "../../../ip_cores"
syn_device = "ep2agx125df"
syn_grade = "c6"
syn_package = "25"
syn_top = "exploder_top"
syn_project = "exploder_top"
quartus_preflow = "exploder_top.tcl"
modules = {"local" : [ "../../../", "../../../top/gsi_exploder/wr_core_demo"]}
syn/gsi_exploder/wr_core_demo/exploder_top.qsf deleted 100644 → 0
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This diff is collapsed.
syn/gsi_exploder/wr_core_demo/exploder_top.tcl deleted 100644 → 0
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source ../../../platform/altera/wr_arria2_phy/wr_arria2_phy.tcl
syn/gsi_scu/wr_core_demo/Makefile deleted 100644 → 0
View file @ f2a6f970
TARGET = scu
DEVICE = EP2AGX125
FLASH = EPCS128
QUARTUS ?= /opt/quartus
QUARTUS_BIN = $(QUARTUS)/bin
all: $(TARGET).sof $(TARGET).jic $(TARGET).rpd
clean:
rm -rf db incremental_db PLLJ_PLLSPE_INFO.txt
rm -f $(TARGET).*.rpt $(TARGET).*.summary $(TARGET).map* $(TARGET).fit.* $(TARGET).pin $(TARGET).jdi $(TARGET)*.qdf $(TARGET).done $(TARGET).qws
rm -f $(TARGET).rpd $(TARGET).jic $(TARGET).pof $(TARGET).sof $(TARGET).dep
%.sof: %.qsf
hdlmake --quartus-proj -v | sed -n -e 's/ *$$/:/;s/^.* Parsing manifest file: *//p' > $*.dep
sed -n -e 's/"//g;s/quartus_sh://;s/$$/:/;s/set_global_assignment.*-name.*_FILE //p' < $< >> $*.dep
echo "$*.sof $@: $< " `sed 's/ *: *$$//' < $*.dep` >> $*.dep
$(QUARTUS_BIN)/quartus_sh --tcl_eval load_package flow \; project_open $* \; execute_flow -compile
%.opt: %.sof
echo "BITSTREAM_COMPRESSION=ON" > $@
%.jic: %.sof %.opt
$(QUARTUS_BIN)/quartus_cpf -c -o $*.opt -d $(FLASH) -s $(DEVICE) $< $@
%.pof: %.sof %.opt
$(QUARTUS_BIN)/quartus_cpf -c -o $*.opt -d $(FLASH) $< $@
%.rpd: %.pof
$(QUARTUS_BIN)/quartus_cpf -c -o $*.opt $< $@
-include $(TARGET).dep
syn/gsi_scu/wr_core_demo/Manifest.py deleted 100644 → 0
View file @ f2a6f970
target = "altera"
action = "synthesis"
fetchto = "../../../ip_cores"
syn_device = "ep2agx125ef"
syn_grade = "c5"
syn_package = "29"
syn_top = "scu_top"
syn_project = "scu"
quartus_preflow = "scu.tcl"
modules = {"local" : [ "../../../", "../../../top/gsi_scu/wr_core_demo"]}
syn/gsi_scu/wr_core_demo/scu.qsf deleted 100644 → 0
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This diff is collapsed.
syn/gsi_scu/wr_core_demo/scu.tcl deleted 100644 → 0
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source ../../../ip_cores/general-cores/platform/altera/wb_pcie/arria2.tcl
source ../../../platform/altera/wr_arria2_phy/wr_arria2_phy.tcl
top/gsi_exploder/wr_core_demo/Manifest.py deleted 100644 → 0
View file @ f2a6f970
fetchto = "../../../ip_cores"
modules = {
"git" : "git://ohwr.org/hdl-core-lib/etherbone-core.git"
};
files = ["exploder_top.sdc", "exploder_top.vhd" ]
top/gsi_exploder/wr_core_demo/exploder_top.cof deleted 100644 → 0
View file @ f2a6f970
<?xml version="1.0" encoding="US-ASCII" standalone="yes"?>
<cof>
<eprom_name>EPCQ256</eprom_name>
<flash_loader_device>EP2AGX125</flash_loader_device>
<output_filename>expoder_top.jic</output_filename>
<n_pages>1</n_pages>
<width>1</width>
<mode>7</mode>
<sof_data>
<user_name>Page_0</user_name>
<page_flags>1</page_flags>
<bit0>
<sof_filename>exploder_top.sof</sof_filename>
</bit0>
</sof_data>
<version>5</version>
<create_cvp_file>0</create_cvp_file>
<options>
<map_file>1</map_file>
</options>
</cof>
\ No newline at end of file
top/gsi_exploder/wr_core_demo/exploder_top.sdc deleted 100644 → 0
View file @ f2a6f970
create_clock -period 125Mhz -name sfp_ref_clk_i [get_ports {sfp_ref_clk_i}]
derive_pll_clocks -create_base_clocks
derive_clock_uncertainty
# Cut the clock domains from each other
set_clock_groups -asynchronous \
-group { altera_reserved_tck } \
-group { clk_20m_vcxo_i dmtd_inst|* } \
-group { clk_125m_local_i sys_inst|* } \
-group { clk_125m_pllref_i ref_inst|* \
wr_gxb*|tx_pll0|* \
wr_gxb*|ch_clk_div0|* \
wr_gxb*|transmit_pma0|* \
wr_gxb*|transmit_pcs0|* } \
-group { sfp_ref_clk_i \
wr_gxb*|rx_cdr_pll0|* \
wr_gxb*|receive_pma0|* \
wr_gxb*|receive_pcs0|* }
top/gsi_exploder/wr_core_demo/exploder_top.vhd deleted 100644 → 0
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top/gsi_scu/wr_core_demo/Manifest.py deleted 100644 → 0
View file @ f2a6f970
fetchto = "../../../ip_cores"
modules = {
"git" : "git://ohwr.org/hdl-core-lib/etherbone-core.git"
};
files = ["scu_top.vhd", "scu_top.sdc"]
top/gsi_scu/wr_core_demo/scu_top.sdc deleted 100644 → 0
View file @ f2a6f970
derive_pll_clocks -create_base_clocks
create_clock -period 33Mhz -name LPC_FPGA_CLK [get_ports {LPC_FPGA_CLK}]
create_clock -period 100Mhz -name pcie_refclk_i [get_ports {pcie_refclk_i}]
create_clock -period 125Mhz -name sfp2_ref_clk_i [get_ports {sfp2_ref_clk_i}]
derive_clock_uncertainty
# Cut the clock domains from each other
set_clock_groups -asynchronous \
-group { altera_reserved_tck } \
-group { LPC_FPGA_CLK } \
-group { clk_20m_vcxo_i dmtd_inst|* } \
-group { clk_125m_local_i sys_inst|* } \
-group { clk_125m_pllref_i ref_inst|* \
wr_gxb*|tx_pll0|* \
wr_gxb*|ch_clk_div0|* \
wr_gxb*|transmit_pma0|* \
wr_gxb*|transmit_pcs0|* } \
-group { sfp2_ref_clk_i \
wr_gxb*|rx_cdr_pll0|* \
wr_gxb*|receive_pma0|* \
wr_gxb*|receive_pcs0|* } \
-group { pcie_refclk_i \
PCIe*|tx_pll0|* \
PCIe*|central_clk_div0|* \
PCIe*|pllfixedclk \
PCIe*|coreclkout } \
-group { PCIe*|rx_cdr_pll0|* \
PCIe*|receive_pma0|* } \
-group { PCIe*|rx_cdr_pll1|* \
PCIe*|receive_pma1|* } \
-group { PCIe*|rx_cdr_pll2|* \
PCIe*|receive_pma2|* } \
-group { PCIe*|rx_cdr_pll3|* \
PCIe*|receive_pma3|* }
top/gsi_scu/wr_core_demo/scu_top.vhd deleted 100644 → 0
View file @ f2a6f970
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