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White Rabbit core collection
Commit 55a101d1 authored by Peter Jansweijer's avatar Peter Jansweijer
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storage eeprom interface via gpio

parent e5c8169a
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      board/spec7/wr_spec7_pkg.vhd
      View file @ 55a101d1
      ......@@ -102,10 +102,8 @@ package wr_spec7_pkg is
      sfp_tx_fault_i : in std_logic := '0';
      sfp_tx_disable_o : out std_logic;
      sfp_los_i : in std_logic := '0';
      eeprom_sda_i : in std_logic;
      eeprom_sda_o : out std_logic;
      eeprom_scl_i : in std_logic;
      eeprom_scl_o : out std_logic;
      eeprom_scl : inout std_logic;
      eeprom_sda : inout std_logic;
      onewire_i : in std_logic;
      onewire_oen_o : out std_logic;
      uart_rxd_i : in std_logic;
      ......
      board/spec7/xwrc_board_spec7.vhd
      View file @ 55a101d1
      ......@@ -153,10 +153,8 @@ entity xwrc_board_spec7 is
      ---------------------------------------------------------------------------
      -- I2C EEPROM
      ---------------------------------------------------------------------------
      eeprom_sda_i : in std_logic;
      eeprom_sda_o : out std_logic;
      eeprom_scl_i : in std_logic;
      eeprom_scl_o : out std_logic;
      eeprom_sda : inout std_logic;
      eeprom_scl : inout std_logic;
      ---------------------------------------------------------------------------
      -- Onewire interface
      ......@@ -331,7 +329,7 @@ architecture struct of xwrc_board_spec7 is
      (c_slave_gpio => x"00000f00"
      );
      constant c_num_gpio_pins : integer := 11;
      constant c_num_gpio_pins : integer := 13;
      signal gpio_out, gpio_in, gpio_oen : std_logic_vector(c_num_gpio_pins-1 downto 0);
      begin -- architecture struct
      ......@@ -529,10 +527,10 @@ begin -- architecture struct
      dac_dpll_data_o => dac_refclk_data,
      phy16_o => phy16_from_wrc,
      phy16_i => phy16_to_wrc,
      scl_o => eeprom_scl_o,
      scl_i => eeprom_scl_i,
      sda_o => eeprom_sda_o,
      sda_i => eeprom_sda_i,
      scl_o => open,
      scl_i => '1',
      sda_o => open,
      sda_i => '1',
      sfp_scl_o => sfp_scl_o,
      sfp_scl_i => sfp_scl_i,
      sfp_sda_o => sfp_sda_o,
      ......@@ -636,7 +634,13 @@ begin -- architecture struct
      pll_wr_mode_o <= gpio_out(9 downto 8);
      -- Bootstrap clock
      pll_clk_sel <= gpio_out(10);
      -- EEPROM I2C tri-states
      eeprom_scl <= '0' when (gpio_out(11) = '0') else 'Z';
      gpio_in(11) <= eeprom_scl;
      eeprom_sda <= '0' when (gpio_out(12) = '0') else 'Z';
      gpio_in(12) <= eeprom_sda;
      sfp_rate_select_o <= '1';
      onewire_oen_o <= onewire_en(0);
      ......
      top/spec7_ref_design/spec7_wr_ref_top.vhd
      View file @ 55a101d1
      ......@@ -269,13 +269,7 @@ architecture top of spec7_wr_ref_top is
      signal clk_ref_div2 : std_logic;
      signal clk_ext_10m : std_logic;
      -- I2C EEPROM
      signal eeprom_sda_in : std_logic;
      signal eeprom_sda_out : std_logic;
      signal eeprom_scl_in : std_logic;
      signal eeprom_scl_out : std_logic;
      -- SFP
      -- SFP
      signal sfp_sda_in : std_logic;
      signal sfp_sda_out : std_logic;
      signal sfp_scl_in : std_logic;
      ......@@ -431,10 +425,8 @@ begin -- architecture top
      sfp_tx_disable_o => sfp_tx_disable_o,
      sfp_los_i => sfp_los_i,
      eeprom_sda_i => eeprom_sda_in,
      eeprom_sda_o => eeprom_sda_out,
      eeprom_scl_i => eeprom_scl_in,
      eeprom_scl_o => eeprom_scl_out,
      eeprom_scl => scl_b,
      eeprom_sda => sda_b,
      onewire_i => '1', -- No onewire, Unique ID now via
      onewire_oen_o => open, -- 24AA025EU48 (I2C Addr 1010.001x)
      ......@@ -561,12 +553,6 @@ begin -- architecture top
      dio_out(1) <= wrc_abscal_rxts_out;
      dio_out(2) <= wrc_abscal_txts_out;
      -- EEPROM I2C tri-states
      sda_b <= '0' when (eeprom_sda_out = '0') else 'Z';
      eeprom_sda_in <= sda_b;
      scl_b <= '0' when (eeprom_scl_out = '0') else 'Z';
      eeprom_scl_in <= scl_b;
      -- LEDs
      U_Extend_PPS : gc_extend_pulse
      generic map (
      ......
      top/spec7_write_design/spec7_write_top.vhd
      View file @ 55a101d1
      ......@@ -273,12 +273,6 @@ architecture top of spec7_write_top is
      signal clk_10m_out : std_logic;
      signal clk_500m : std_logic;
      -- I2C EEPROM
      signal eeprom_sda_in : std_logic;
      signal eeprom_sda_out : std_logic;
      signal eeprom_scl_in : std_logic;
      signal eeprom_scl_out : std_logic;
      -- SFP
      signal sfp_sda_in : std_logic;
      signal sfp_sda_out : std_logic;
      ......@@ -475,10 +469,8 @@ AXI2WB : xwb_axi4lite_bridge
      sfp_tx_disable_o => sfp_tx_disable_o,
      sfp_los_i => sfp_los_i,
      eeprom_sda_i => eeprom_sda_in,
      eeprom_sda_o => eeprom_sda_out,
      eeprom_scl_i => eeprom_scl_in,
      eeprom_scl_o => eeprom_scl_out,
      eeprom_scl => scl_b,
      eeprom_sda => sda_b,
      onewire_i => '1', -- No onewire, Unique ID now via
      onewire_oen_o => open, -- 24AA025EU48 (I2C Addr 1010.001x)
      ......@@ -586,14 +578,6 @@ AXI2WB : xwb_axi4lite_bridge
      pps_i => wrc_pps_out,
      clk_10mhz_o => clk_10m_out
      );
      ------------------------------------------------------------------------------
      -- EEPROM I2C tri-states
      ------------------------------------------------------------------------------
      sda_b <= '0' when (eeprom_sda_out = '0') else 'Z';
      eeprom_sda_in <= sda_b;
      scl_b <= '0' when (eeprom_scl_out = '0') else 'Z';
      eeprom_scl_in <= scl_b;
      -- LEDs
      U_Extend_PPS : gc_extend_pulse
      ......
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