Skip to content

W
White Rabbit core collection
Commit 3fe20766 authored by Tristan Gingold's avatar Tristan Gingold
Browse files
Options

Increase spec, svec and cute boards memory size to 144KB

parent 054200a6
Pipeline #3326 failed with stage
    Hide whitespace changes
    Inline Side-by-side
    Showing with 11 additions and 5 deletions
    board/common/wr_board_pkg.vhd
    View file @ 3fe20766
    ......@@ -101,6 +101,7 @@ package wr_board_pkg is
    g_simulation : integer := 0;
    g_verbose : boolean := TRUE;
    g_with_external_clock_input : boolean := TRUE;
    g_ram_address_space_size_kb : integer := 128;
    g_board_name : string := "NA ";
    g_flash_secsz_kb : integer := 256; -- default for M25P128
    g_flash_sdbfs_baddr : integer := 16#600000#; -- default for M25P128
    ......
    board/common/xwrc_board_common.vhd
    View file @ 3fe20766
    ......@@ -52,6 +52,7 @@ entity xwrc_board_common is
    g_verbose : boolean := TRUE;
    g_with_external_clock_input : boolean := TRUE;
    g_board_name : string := "NA ";
    g_ram_address_space_size_kb : integer := 128;
    g_flash_secsz_kb : integer := 256; -- default for M25P128
    g_flash_sdbfs_baddr : integer := 16#600000#; -- default for M25P128
    g_phys_uart : boolean := TRUE;
    ......@@ -372,6 +373,7 @@ begin -- architecture struct
    g_simulation => g_simulation,
    g_verbose => g_verbose,
    g_with_external_clock_input => g_with_external_clock_input,
    g_ram_address_space_size_kb => g_ram_address_space_size_kb,
    g_board_name => g_board_name,
    g_flash_secsz_kb => g_flash_secsz_kb,
    g_flash_sdbfs_baddr => g_flash_sdbfs_baddr,
    ......
    board/cute/xwrc_board_cute.vhd
    View file @ 3fe20766
    ......@@ -602,6 +602,7 @@ begin -- architecture struct
    g_simulation => g_simulation,
    g_with_external_clock_input => g_with_external_clock_input,
    g_board_name => "CUTE",
    g_ram_address_space_size_kb => 256,
    g_flash_secsz_kb => 64, -- sector size for M25P32
    g_flash_sdbfs_baddr => 16#2e0000#, -- sdbfs after multiboot bitstream
    g_phys_uart => TRUE,
    ......@@ -610,7 +611,7 @@ begin -- architecture struct
    g_ep_rxbuf_size => 1024,
    g_tx_runt_padding => TRUE,
    g_dpram_initf => g_dpram_initf,
    g_dpram_size => 131072/4,
    g_dpram_size => 144*1024/4,
    g_interface_mode => PIPELINED,
    g_address_granularity => BYTE,
    g_aux_sdb => g_aux_sdb,
    ......
    board/spec/xwrc_board_spec.vhd
    View file @ 3fe20766
    ......@@ -7,7 +7,7 @@
    -- Author(s) : Grzegorz Daniluk <grzegorz.daniluk@cern.ch>
    -- Company : CERN (BE-CO-HT)
    -- Created : 2017-02-17
    -- Last update: 2019-04-23
    -- Last update: 2022-03-10
    -- Standard : VHDL'93
    -------------------------------------------------------------------------------
    -- Description: Top-level wrapper for WR PTP core including all the modules
    ......@@ -438,6 +438,7 @@ begin -- architecture struct
    g_verbose => g_verbose,
    g_with_external_clock_input => g_with_external_clock_input,
    g_board_name => "SPEC",
    g_ram_address_space_size_kb => 256,
    g_flash_secsz_kb => 64, -- sector size for M25P32
    g_flash_sdbfs_baddr => 16#2e0000#, -- sdbfs after multiboot bitstream
    g_phys_uart => TRUE,
    ......@@ -446,7 +447,7 @@ begin -- architecture struct
    g_ep_rxbuf_size => 1024,
    g_tx_runt_padding => TRUE,
    g_dpram_initf => g_dpram_initf,
    g_dpram_size => 131072/4,
    g_dpram_size => 144*1024/4,
    g_interface_mode => PIPELINED,
    g_address_granularity => BYTE,
    g_aux_sdb => g_aux_sdb,
    ......
    board/svec/xwrc_board_svec.vhd
    View file @ 3fe20766
    ......@@ -7,7 +7,7 @@
    -- Author(s) : Dimitrios Lampridis <dimitrios.lampridis@cern.ch>
    -- Company : CERN (BE-CO-HT)
    -- Created : 2017-02-16
    -- Last update: 2019-09-25
    -- Last update: 2022-03-10
    -- Standard : VHDL'93
    -------------------------------------------------------------------------------
    -- Description: Top-level wrapper for WR PTP core including all the modules
    ......@@ -443,6 +443,7 @@ begin -- architecture struct
    g_verbose => g_verbose,
    g_with_external_clock_input => g_with_external_clock_input,
    g_board_name => "SVEC",
    g_ram_address_space_size_kb => 256,
    g_flash_secsz_kb => 256, -- default for M25P128
    g_flash_sdbfs_baddr => 16#600000#, -- default for M25P128
    g_phys_uart => TRUE,
    ......@@ -451,7 +452,7 @@ begin -- architecture struct
    g_ep_rxbuf_size => 1024,
    g_tx_runt_padding => TRUE,
    g_dpram_initf => g_dpram_initf,
    g_dpram_size => 131072/4,
    g_dpram_size => 144*1024/4,
    g_interface_mode => PIPELINED,
    g_address_granularity => BYTE,
    g_aux_sdb => c_wrc_periph3_sdb,
    ......
    Markdown is supported
    0% or
    You are about to add 0 people to the discussion. Proceed with caution.
    Finish editing this message first!
    Please register or to comment