wrc_core: increase LM32 code/data address space to 256 kB

2931c154 · Tomasz Wlostowski · cf938b02 · 2931c154
Commit 2931c154 authored Sep 25, 2019 by Tomasz Wlostowski
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wr_core.vhd modules/wrc_core/wr_core.vhd +3 -3

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--- a/modules/wrc_core/wr_core.vhd
+++ b/modules/wrc_core/wr_core.vhd
@@ -6,7 +6,7 @@
 -- Author     : Grzegorz Daniluk <grzegorz.daniluk@cern.ch>
 -- Company    : CERN (BE-CO-HT)
 -- Created    : 2011-02-02
-- Last update: 2019-06-12
+-- Last update: 2019-07-24
 -- Platform   : FPGA-generics
 -- Standard   : VHDL
 -------------------------------------------------------------------------------
@@ -436,8 +436,8 @@ architecture struct of wr_core is
  -----------------------------------------------------------------------------
  constant c_layout : t_sdb_record_array(1 downto 0) :=
    (0 => f_sdb_embed_device(f_xwb_dpram(g_dpram_size), x"00000000"),
-     1 => f_sdb_embed_bridge(c_secbar_bridge_sdb, x"00020000"));
-  constant c_sdb_address : t_wishbone_address := x"00030000";
+     1 => f_sdb_embed_bridge(c_secbar_bridge_sdb, x"00040000"));
+  constant c_sdb_address : t_wishbone_address := x"00050000";

  signal cbar_slave_i  : t_wishbone_slave_in_array (2 downto 0);
  signal cbar_slave_o  : t_wishbone_slave_out_array(2 downto 0);