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White Rabbit core collection
Commit 0ac188c8 authored by Grzegorz Daniluk's avatar Grzegorz Daniluk
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testbench/wr_minic: cleanup, test Tx and Rx path in the same time

parent af24ca6d
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Showing with 200 additions and 204 deletions
testbench/wr_minic/Manifest.py
View file @ 0ac188c8
......@@ -5,8 +5,6 @@ syn_grade = "-3"
syn_package = "fgg484"
sim_tool = "modelsim"
top_module = "main"
fetchto = "../../ip_cores"
vlog_opt = "+incdir+../../sim"
include_dirs = [ "../../sim" ]
......
testbench/wr_minic/main.sv
View file @ 0ac188c8
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testbench/wr_minic/run_ci.do
View file @ 0ac188c8
......@@ -4,5 +4,6 @@ vsim -L unisim -t 10fs work.main -voptargs="+acc"
set StdArithNoWarnings 1
set NumericStdNoWarnings 1
do wave.do
run 100ms
run 200ms
#runStatus -full
quit -code [coverage attribute -name TESTSTATUS -concise]
testbench/wr_minic/wave.do
View file @ 0ac188c8
onerror {resume}
quietly WaveActivateNextPane {} 0
add wave -noupdate /main/txp_cg_newframe
add wave -noupdate /main/rxp_cg_newframe
add wave -noupdate /main/txp_cg_size
add wave -noupdate /main/rxp_cg_size
add wave -noupdate /main/DUT/g_interface_mode
add wave -noupdate /main/DUT/g_address_granularity
add wave -noupdate /main/DUT/g_memsize_log2
add wave -noupdate /main/DUT/g_buffer_little_endian
add wave -noupdate /main/DUT/clk_sys_i
add wave -noupdate /main/DUT/rst_n_i
......@@ -65,7 +68,7 @@ add wave -noupdate -expand -group RX_PATH /main/DUT/rx_fifo_afull
add wave -noupdate -expand -group RX_PATH /main/DUT/irq_rx_ack
add wave -noupdate -expand -group RX_PATH /main/DUT/irq_rx
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {{Cursor 1} {40485000000 fs} 1} {{Cursor 2} {2056885000000 fs} 0}
WaveRestoreCursors {{Cursor 1} {40485000000 fs} 1} {{Cursor 2} {7845093670430 fs} 0}
configure wave -namecolwidth 208
configure wave -valuecolwidth 100
configure wave -justifyvalue left
......@@ -80,4 +83,4 @@ configure wave -griddelta 40
configure wave -timeline 0
configure wave -timelineunits ns
update
WaveRestoreZoom {0 fs} {84338283750 ps}
WaveRestoreZoom {0 fs} {15051471750 ps}
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