... | ... | @@ -14,7 +14,7 @@ To perform the steps below you would need a computer with Linux |
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operating system. Building WR PTP Core firmware consist of two steps:
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synthesizing HDL project and compiling LM32 firmware. The former
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requires hdlmake tool (https://www.ohwr.org/project/hdl-make) while the
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latter lm32 toolchain. The step-by-step procedure is listed below.
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latter, lm32 toolchain. The step-by-step procedure is listed below.
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Please notice that you can add the $PATH variable modifications to your
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.bashrc file. Thus the hdlmake and lm32 toolchain directories would be
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always automatically added to $PATH.
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... | ... | @@ -41,19 +41,24 @@ from any location: |
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$ export PATH=`pwd`/hdl-make:$PATH
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```
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4\. clone wr-cores git repo which contains HDL core for WR PTP Core:
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4\. please, make sure you have the Xilinx ISE-related variables set from
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the execution of *settings32.sh* script from your Xilinx ISE
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installation directory (default location is
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*/opt/Xilinx/<version>/ISE\_DS/settings32.sh* ). Current version od
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*hdlmake* requires the correction of $XILINX system variable after the
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script. This issue is already reported to the author of the tool and
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should be fixed soon. Meanwhile, you have to set $XILINX to (the command
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for default installation location):
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```
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$ git clone git:https://www.ohwr.org/hdl-core-lib/wr-cores.git
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$ cd wr-cores
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$ export XILINX=/opt/Xilinx/<version>/ISE_DS
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```
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5\. the newest version of WR PTP Core is currently stored in wishbonized
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branch of wr-cores repo, so it is recommended to change local branch
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from master to wishbonized:
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5\. clone wr-cores git repo which contains HDL core for WR PTP Core:
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```
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$ git checkout wishbonized
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$ git clone git:https://www.ohwr.org/hdl-core-lib/wr-cores.git
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$ cd wr-cores
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```
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6\. create Makefile for synthesis using hdlmake:
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... | ... | @@ -69,37 +74,35 @@ from master to wishbonized: |
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$ make
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```
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8\. as the result the spec\_top.bin file would be generated. It can be
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loaded to SPEC as described here:
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https://www.ohwr.org/project/spec-sw/wikis/documents
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as the result the *spec\_top.bin* file will be generated.
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### Compiling LM32 firmware:
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9\. go back to the wrpc directory created in the 1st step:
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8\. go back to the wrpc directory created in the 1st step:
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```
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$ cd ../../../../
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```
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10\. download the lm32 toolchain from ohwr:
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9\. download the lm32 toolchain from ohwr:
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```
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$ wget https://www.ohwr.org/project/wr-cores/uploads/a2e8eeba448fbc8d580e68004e6f6c7f/lm32.tar.xz
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```
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11\. unpack the toolchain:
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10\. unpack the toolchain:
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```
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$ tar xJf lm32.tar.xz
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```
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12\. add toolchain binaries to PATH variable:
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11\. add toolchain binaries to PATH variable:
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```
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$ export PATH=`pwd`/lm32/bin:$PATH
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```
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13\. clone the git repo with software for WR PTP
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12\. clone the git repo with software for WR PTP
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Core:
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```
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... | ... | @@ -107,7 +110,7 @@ Core: |
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$ cd wrpc-sw
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```
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14\. the WRPC software git repository has a ptp-noposix repository
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13\. the WRPC software git repository has a ptp-noposix repository
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defined as a submodule, it has to be fetched first before building the
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software binary:
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... | ... | @@ -116,7 +119,7 @@ software binary: |
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$ git submodule update
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```
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15\. compile the LM32 firmware, the Etherbone support can be turned
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14\. compile the LM32 firmware, the Etherbone support can be turned
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on/off by modifying the WITH\_ETHERBONE flag inside Makefile:
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```
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... | ... | @@ -125,10 +128,11 @@ on/off by modifying the WITH\_ETHERBONE flag inside Makefile: |
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The decision whether WR PTP should run in WR Master or WR Slave mode is
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no longer made at compilation time, but later by executing appropriate
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WR Shell commands.
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WR Shell commands. The firmware binary created at this point is
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*wrc.bin* file.
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16\. as the result the wrc.bin file will be generated. It can be loaded
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to SPEC as described here:
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15\. Both FPGA and LM32 binaries can be loaded into SPEC board using
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*spec-sw* package as described in its manual:
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https://www.ohwr.org/project/spec-sw/wikis/documents
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## WR PTP Core shell:
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... | ... | @@ -138,74 +142,110 @@ vUART) the WRPC Shell is available and can be used to configure the |
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module. The full list of supported commands with their arguments is
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available here: \*[WR PTP Core shell commands](wrpc-shell)*.
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By default WRPC works in WR Slave mode, but this can be changed by
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executing the following commands:
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When WRPC starts for the first time on a new SPEC board it is important
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to create the SFP database with calibration parameters and the init
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script that will be executed every time after the core resets. This
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information is stored inside FMC Mezzanine's EEPROM. In this release of
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WR PTP Core only WRPC Shell can be used to build the database and script
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but there is a set of tools coming in *wrpc-sw* and *spec-sw* repos to
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make it possible also directly from the host PC. It will take the
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content from **.bin or**.tlv file and write it to EEPROM chip using the
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special kernel modul.
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### Calibration database
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First you have to create the empty database in EEPROM:
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```
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wrc# mode master
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wrc# ptp start
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wrc# sfp erase
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```
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It is also important to use the right calibration parameters for the SFP
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transceiver. The list of supported SFPs can be found on a [wiki
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page](https://www.ohwr.org/project/white-rabbit/wikis/SFP)
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The list of supported SFPs can be found on a [wiki
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page](https://www.ohwr.org/project/white-rabbit/wikis/SFP)
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The example below adds two Axcen SFP transceivers widely used in White
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Rabbit development and demos together with the calibration parameters
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associated with them:
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```
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wrc# sfp add AXGE-1254-0531 46407 177093 73622176
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wrc# sfp add AXGE-3454-0531 46407 177093 -73622176
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```
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They should be added first to the internal EEPROM SFP database. For two
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Axcen SFPs that are widely used in WR project and demos this can be done
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by executing the following shell commands:
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At this point you should call the Shell commands to detect the SFP
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plugged into the SPEC board, match it to one of those stored in database
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and run the calibration procedure that will measure the t2/t4 phase
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transition point:
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```
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wrc# sfp add AXGE-1254-0531 46407 177093 73622176
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wrc# sfp add AXGE-3454-0531 46407 177093 -73622176
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wrc# sfp detect
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wrc# sfp match
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wrc# calibration force
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```
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But please be aware that it will store the information to the EEPROM on
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currently used FMC Mezzanine board. This means those commands should be
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used only once for the given FMC board (SFP database will be stored
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inside EEPROM also when the SPEC is powered off).
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Measured value will be then stored inside the structure of calibration
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database in EEPROM so that it could be used next time when WRPC starts.
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This calibration function should be executed only once but for every new
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FPGA firmware synthesized from *wr-cores* repository. That means you
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don't have to repeat it every time something gets changed in LM32
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software, but you have to repeat it every time you synthesize new FPGA
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bitstream.
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### Init script
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Creating the init script inside FMC EEPROM is very convenient way of
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ensuring that WRPC will always start automatically and configure itself
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to the required functionality. Its content depends on particular use
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case but the basic ones for running WRPC in WR Slave and WR Master mode
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are presented below:
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Th parameters of the plugged SFP can be determined and passed to the WR
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PTP daemon:
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Creating WRPC init script for WR Slave mode:
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```
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wrc# sfp detect
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wrc# sfp match
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wrc# init erase
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wrc# init add ptp stop
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wrc# init add sfp detect
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wrc# init add sfp match
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wrc# init add calibration
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wrc# init add mode slave
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wrc# init add ptp start
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```
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Another thing that needs to be done before running the WRPC
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synchronization stack is the calibration. The procedure has to be
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executed once for each freshly synthesized FPGA bitstream. However,
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after that, the value is stored in FMC EEPROM (just before the SFP
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database) and can be loaded from there every time the WRPC starts. To
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measure the t2/t4 phasae transition for new gateware loaded to SPEC
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board please execute the following WRPC Shell command:
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Creating WRPC init script for WR Master mode:
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```
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wrc# calibration force
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wrc# init erase
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wrc# init add ptp stop
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wrc# init add sfp detect
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wrc# init add sfp match
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wrc# init add calibration
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wrc# init add mode master
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wrc# init add ptp start
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```
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To fetch the value stored before in EEPROM you should type:
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Plase notice that both those examples contain the call of *calibration*
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command. However, without *force* parameter it just tries to read t2/t4
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phase transition value stored previously in EEPROM.
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### Running the Core:
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Having the SFP database and init script stored in FMC EEPROM, the WRPC
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will always execute the script after being programmed or when coming
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back from reset state. Then the monitoring function can be executed to
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check the synchronization status:
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```
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wrc# calibration
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wrc# gui
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```
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If this command cannot find a valid transition parameter stored in
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EEPROM it runs the calibration procedure (equivalent to *calibration
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force*).
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The good advice at this point is to add *calibration*, *sfp detect* and
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*sfp match* commands to the WRPC init script using the *init* shell
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command:
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or the status can be continuously reported as the one log-line per
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second:
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```
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wrc# init add ptp stop
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wrc# init add sfp detect
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wrc# init add sfp match
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wrc# init add calibration
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wrc# init add ptp start
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wrc# stat cont
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```
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To return back to WRPC Shell prompt please press *Esc* key.
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### Files
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