MEM *_rd_i strobe is useless
According to the https://www.ohwr.org/project/wishbone-gen/wikis/Wbgen2_ram#21-Simple-RAM-block it seems, that memory address is strobed by gpio_mem2_rd_i and than data is outputted. But it is not true - gpio_mem2_rd_i is not connected anywhere (see rd_b_i and also rd_a_i in https://www.ohwr.org/project/wishbone-gen/commits/master/lib/wbgen2_dpssram.vhd) and data is outputted on every address change - after one clock cycle. Port gpio_mem2_rd_i should not be generated and behaviour of the memory should be mentioned on the link above.