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<td><b> Prio</b></td>
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<td><b> Contact </b></td>
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<td><b> Expertise required </b></td>
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<td><b> Concerns </b></td>
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<td><b> Description </b></td>
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<td><strong>Status</strong></td>
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</tr>
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<td>high</td>
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<td>CERN/[Maciej](https://phonebook.cern.ch/phonebook/#persondetails/?id=668353)</td>
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<td>LM32, C, embedded devices</td>
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<td>WR switch</td>
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<td>This project automates calibration of alpha parameter that is used to calculate fiber asymmetry (in WR Switch).</td>
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<td>idle</td>
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</tr>
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... | ... | @@ -136,6 +138,7 @@ major clean-up or rewrite. |
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<td>high</td>
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<td>CERN/[Maciej](https://phonebook.cern.ch/phonebook/#persondetails/?id=668353)</td>
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<td>LM32, embedded C, VHDL</td>
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<td>WR switch</td>
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<td>Rewrite of the proof-of-concept implementation of seamless redundancy for timing (in WR Switch),<br />
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see [Redundant White Rabbit Network for Reliable Synchronization](https://www.ohwr.org/project/white-rabbit/uploads/3bb36410af6837199a2ead7957f11371/WR_Maciej_WRWS2016_Redundancy.pdf).</td>
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<td>Idle</td>
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... | ... | @@ -145,6 +148,7 @@ see [Redundant White Rabbit Network for Reliable Synchronization](https://www.oh |
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<td>low</td>
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<td>CERN/[Maciej](https://phonebook.cern.ch/phonebook/#persondetails/?id=668353)</td>
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<td>expert VHDL</td>
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<td>WR switch</td>
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<td>The aim of this project is to optimize through pipelining the lookup of MAC addresses in HASH table (in WR Switch).</td>
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<td>idle</td>
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</tr>
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... | ... | @@ -153,6 +157,7 @@ see [Redundant White Rabbit Network for Reliable Synchronization](https://www.oh |
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<td>low</td>
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<td>CERN/[Maciej](https://phonebook.cern.ch/phonebook/#persondetails/?id=668353)</td>
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<td>VHDL</td>
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<td>WR switch</td>
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<td>Implementation of the IEEE <a href="http://www.ieee802.org/1/pages/802.1cb.html">802.1CB</a> in WR switch</td>
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<td>Idle</td>
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</tr>
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