... | ... | @@ -143,12 +143,12 @@ A: It is. The company Seven Solutions has performed extensive EMC tests |
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on the
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switch.
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### Q: The output from the SMC connector labeled at 125MHz is tuned at 62.5Mhz frequency?
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### Q: The output from the SMC connector labeled at 125MHz (OUT) is tuned at 62.5Mhz frequency?
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A: This is perfectly normal, the design inside the FPGA has been
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modified to be compatible with the speed of transceivers.
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62.5Mhz is the new reference clock of the HDL design, the 125MHz will be
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labeled differently in the next batch.
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A: In the initial version of the switch the reference frequency was set
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at 125MHz, but the gateware have been modify during the production.
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Therefore some old box are still labeled with 125 MHz. On the new box,
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you will find this output labeled as CLK (OUT).
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??Author: Benoit Rat, [Seven
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Solutions](www.sevensols.com??)
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