Q: I use the SVEC. How can I change the base address  by writing appropriate values in some registers (ADER, ADEM, and possibly others)?

faq.md

@@ -41,6 +41,11 @@ Resuming, yes it is a perfectly usable core:
 We will also be happy to receive feedback from you when you'll dig into
 the code.
 
+May 2017: the core is still used for any design using the SVEC. You may
+follow any [outstanding
+issues](https://www.ohwr.org/project/vme64x-core/issues) (that don't
+stop us from using this core).
+
 -----
 
 ## Technical
@@ -84,8 +89,21 @@ Officially we support only:
     This is the default setup in `VME_CR_pack.vhd`. 
 
 Certain other modes (A16, unaligned/byte/halfword accesses) are
-implemented in the VHDL but have not been fully tested.  
-\---
+implemented in the VHDL but have not been fully
+tested.
+
+### Q: I use the SVEC. How can I change the base address by writing appropriate values in some registers (ADER, ADEM, and possibly others)?
+
+Probably the example in the documentation of the
+[VME64xCore](https://www.ohwr.org/project/vme64x-core/commits/master/documentation/user_guides/vme64x_user_manual.pdf)
+of the SVEC is the most helpful in this, as it contains worked
+examples.  
+In addition, the code of [svec\_setup\_csr() in the svec device
+driver](https://www.ohwr.org/project/svec-sw/tree/master/) can also be
+very helpful in understanding how you can do the configuration by
+writing to the Address Relocation Registers.
+
+-----
 
-Davide Pedretti, Erik van der Bij, Tomasz Wlostowski - 17 March 2014
+Davide Pedretti, Erik van der Bij, Tomasz Wlostowski - 10 May 2017