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@@ -44,14 +44,12 @@ manual](https://www.ohwr.org/project/vme64x-core/commits/master/trunk/documentat
 
 ## Documents
 
-  - [VME64
-    ANSI/VITA 1 1994](https://www.ohwr.org/1477)
-  - [VME64 Extensions
-    ANSI/VITA 1.1 1997](https://www.ohwr.org/1478)
   - [Wishbone System-on-chip (SoC) Interconnection Architecture for
     Portable IP Cores, Revision
     B4](https://www.ohwr.org/1479)
-  - [ANSI/VITA 1.5-2003 2eSST](https://www.ohwr.org/1480)
+  - VME64 ANSI/VITA 1 1994
+  - VME64 Extensions ANSI/VITA 1.1 1997
+  - ANSI/VITA 1.5-2003 2eSST
 
 ## Contacts
 
@@ -99,14 +97,13 @@ manual](https://www.ohwr.org/project/vme64x-core/commits/master/trunk/documentat
 </tr>
 <tr class="odd">
 <td>30-07-2012</td>
-<td>SINGLE, BLT (D32), MBLT (D64) transfers in A16, A24, A32 and A64 address modes working on VFC V2 and SVEC V0. A ROACK type IRQ Controller is provided.</td>
+<td>SINGLE, BLT (D32), MBLT (D64) transfers in A16, A24, A32 and A64 address modes working<br />
+on VFC V2 and SVEC V0. A ROACK type IRQ Controller is provided.</td>
 </tr>
 </tbody>
 </table>
 
 -----
 
-Davide Pedretti 10 August 2012
-
------
+Davide Pedretti - 10 August 2012