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|03-05-2012|Core has been modified to implement CSR space. CSR and single R/W working on [VFC V2](https://www.ohwr.org/project/fmc-vme-carrier/wiki).|
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|10-05-2012|Working on BLT, MBLT and 2eSST implementation.|
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|06-06-2012|Added data swap modes. A64, 2eVME and 2eSST not yet implemented. Independent tester added to team.|
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|30-07-2012|SINGLE, BLT (D32), MBLT (D64) transfers in A16, A24, A32 and A64 address modes working
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on VFC V2 and SVEC V0. A ROACK type IRQ Controller is provided.|
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|30-07-2012|SINGLE, BLT (D32), MBLT (D64) transfers in A16, A24, A32 and A64 address modes working <br/> on VFC V2 and SVEC V0. A ROACK type IRQ Controller is provided.|
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|30-11-2012|Student Davide Pedretti left CERN. [Thesis](https://www.ohwr.org/project/vme64x-core/wikis/Documents/Design-implementation-and-test-of-a-VME-to-WB-interface) available. Core works.|
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|07-03-2013|Several bugs found and corrected. Core is working, but needs a good review.|
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|01-07-2013|Migrated the repository to Git.|
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