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Jean-Paul Ricaud authored
On branch development new file: CAD/RF/1590Q_back.dxf new file: CAD/RF/1590Q_front.dxf new file: CAD/RF/1590Q_left.dxf new file: CAD/RF/1590Q_top.dxf new file: CAD/coverplate.dwg new file: CAD/crate_bottom.dwg new file: CAD/t/#Untitled.dxf new file: CAD/t/#hot.dxf new file: CAD/t/1590Q.dwg new file: CAD/t/EL_0100.dwg new file: CAD/t/Traced.dxf new file: CAD/t/Untitled.dxf new file: CAD/t/crate_bottom.dwg new file: CAD/t/hot.dxf new file: CAD/tmp/#crate_bottom.dxf new file: CAD/tmp/crate_bottom.dxf new file: SPICE_simulation/OPA2209/OPA2209.LIB new file: SPICE_simulation/OPA2209/OPA2209_MFB-transit.asc new file: SPICE_simulation/OPA2209/OPA2209_butterworth-transit.asc new file: SPICE_simulation/OPA2209/OPA2209_butterworth.asc new file: SPICE_simulation/OPA2209/OPA2209_g10.asc new file: TimIQ.pro new file: fpga/TimIQ/top.ucf new file: fpga/sources/clk_sources.vhdl new file: fpga/sources/outputmux.vhdl new file: fpga/sources/registers_init.vhdl new file: fpga/sources/reset.vhdl new file: fpga/sources/src_clkpadding/clkpadding_config.txt new file: fpga/sources/src_clkpadding/clkpadding_top.vhdl new file: fpga/sources/top - Copie.vhdl new file: fpga/sources/top.vhdl new file: fpga/sources/type_lib.vhdl new file: pcb/CPU/TimIQ-CPU_pcb.net new file: pcb/CPU/TimIQ_CPU-bottom.pos new file: pcb/CPU/TimIQ_CPU-top.pos new file: pcb/CPU/TimIQ_CPU.pro new file: pcb/CPU/gerber/TimIQ_CPU-B.Mask.gbr new file: pcb/CPU/gerber/TimIQ_CPU-B.Paste.gbr new file: pcb/CPU/gerber/TimIQ_CPU-B.SilkS.gbr new file: pcb/CPU/gerber/TimIQ_CPU-Cmts.User.gbr new file: pcb/CPU/gerber/TimIQ_CPU-Dwgs.User.gbr new file: pcb/CPU/gerber/TimIQ_CPU-Edge.Cuts.gbr new file: pcb/CPU/gerber/TimIQ_CPU-F.Mask.gbr new file: pcb/CPU/gerber/TimIQ_CPU-F.Paste.gbr new file: pcb/CPU/gerber/TimIQ_CPU-F.SilkS.gbr new file: pcb/CPU/gerber/TimIQ_CPU-L1_TOP.gbr new file: pcb/CPU/gerber/TimIQ_CPU-L2_GND.gbr new file: pcb/CPU/gerber/TimIQ_CPU-L3_DIGITAL.gbr new file: pcb/CPU/gerber/TimIQ_CPU-L4_DIGITAL.gbr new file: pcb/CPU/gerber/TimIQ_CPU-L5_PSU.gbr new file: pcb/CPU/gerber/TimIQ_CPU-L6_DIGITAL.gbr new file: pcb/CPU/gerber/TimIQ_CPU-L7_PSU.gbr new file: pcb/CPU/gerber/TimIQ_CPU-L8_BOTTOM.gbr new file: pcb/CPU/gerber/TimIQ_CPU-NPTH.drl new file: pcb/CPU/gerber/TimIQ_CPU.drl new file: pcb/CPU/gerber/Transcode Report.txt new file: pcb/RF/TimIQ_RF-bottom.pos new file: pcb/RF/TimIQ_RF-top.pos new file: pcb/RF/TimIQ_RF.pro new file: pcb/RF/TimIQ_pcb.net new file: pcb/RF/gerber/TimIQ_RF-B.Mask.gbr new file: pcb/RF/gerber/TimIQ_RF-B.Paste.gbr new file: pcb/RF/gerber/TimIQ_RF-B.SilkS.gbr new file: pcb/RF/gerber/TimIQ_RF-Cmts.User.gbr new file: pcb/RF/gerber/TimIQ_RF-Dwgs.User.gbr new file: pcb/RF/gerber/TimIQ_RF-Edge.Cuts.gbr new file: pcb/RF/gerber/TimIQ_RF-F.Mask.gbr new file: pcb/RF/gerber/TimIQ_RF-F.Paste.gbr new file: pcb/RF/gerber/TimIQ_RF-F.SilkS.gbr new file: pcb/RF/gerber/TimIQ_RF-L1_TOP-RO4350_B.gbr new file: pcb/RF/gerber/TimIQ_RF-L2_GND.gbr new file: pcb/RF/gerber/TimIQ_RF-L3_ANALOG.gbr new file: pcb/RF/gerber/TimIQ_RF-L4_PSU.gbr new file: pcb/RF/gerber/TimIQ_RF-L5_PSU.gbr new file: pcb/RF/gerber/TimIQ_RF-L6_PSU.gbr new file: pcb/RF/gerber/TimIQ_RF-L7_DIGITAL.gbr new file: pcb/RF/gerber/TimIQ_RF-L8_BOTTOM.gbr new file: pcb/RF/gerber/TimIQ_RF-NPTH.drl new file: pcb/RF/gerber/TimIQ_RF.drl new file: pcb/RF/gerber/Transcode Report.txt new file: sch/CPU/BeagleBone.sch new file: sch/CPU/Ethernet_PHY.sch new file: sch/CPU/Expansion_connectors.sch new file: sch/CPU/FPGA.sch new file: sch/CPU/FPGA_config.sch new file: sch/CPU/PSU.sch new file: sch/CPU/TimIQ-CPU_BOM_2016_07_08.xlsx new file: sch/CPU/TimIQ-CPU_BOM_MANUFACTURER_2016_07_08.xlsx new file: sch/CPU/TimIQ-CPU_sch-cache.lib new file: sch/CPU/TimIQ-CPU_sch.net new file: sch/CPU/TimIQ-CPU_sch.pro new file: sch/CPU/TimIQ-CPU_sch.sch new file: sch/CPU/digital.sch new file: sch/CPU/input.sch new file: sch/CPU/outputs.sch new file: sch/CPU/reset.sch new file: sch/CPU/top.sch new file: sch/RF/ADC.sch new file: sch/RF/DAC.sch new file: sch/RF/DAC_interface.sch new file: sch/RF/IQmodulator.sch new file: sch/RF/PLL.sch new file: sch/RF/PSU.sch new file: sch/RF/TimIQ-RF_BOM.xlsx new file: sch/RF/TimIQ-RF_BOM_MANUFATURER_2016-05-06.xlsx new file: sch/RF/TimIQ-RF_BOM_REF_2016-05-06.xlsx new file: sch/RF/TimIQ-RF_sch-cache.lib new file: sch/RF/TimIQ-RF_sch.pro new file: sch/RF/TimIQ-RF_sch.sch new file: sch/RF/TimIQ_RF_sch.net new file: sch/RF/digital.sch new file: sch/RF/freq_div.sch new file: sch/RF/mixers.sch new file: sch/RF/top.sch
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