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Simple VME FMC Carrier 7 - SVEC7
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Simple VME FMC Carrier 7 - SVEC7
Issues
Open
12
Closed
85
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97
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Vadj_FMC
#17
· opened
Mar 16, 2020
by
Filip Świtakowski
CLOSED
3
updated
Mar 23, 2020
Schematics aren't compiling.
#16
· opened
Mar 16, 2020
by
Filip Świtakowski
CLOSED
1
updated
Mar 23, 2020
Missing Differential pair labels
#15
· opened
Mar 16, 2020
by
Filip Świtakowski
CLOSED
1
updated
Mar 16, 2020
NON-CERN components
#14
· opened
Mar 16, 2020
by
Filip Świtakowski
CLOSED
1
updated
Mar 16, 2020
V3 - mini displayPort connector obsolete (J5, J9)
#13
· opened
Mar 16, 2020
by
Filip Świtakowski
CLOSED
5
updated
Aug 13, 2020
FPGA Bank Assignment
#12
· opened
Feb 05, 2020
by
Mikolaj Sowinski
Ready for schematic review (CTI internal)
design
CLOSED
0
updated
Feb 19, 2020
GTX Transcivers mapping
#11
· opened
Feb 05, 2020
by
Mikolaj Sowinski
Ready for schematic review (CTI internal)
design
CLOSED
1
updated
Feb 12, 2020
FMC Connectors
#10
· opened
Feb 05, 2020
by
Mikolaj Sowinski
Ready for schematic review (CTI internal)
design
CLOSED
0
updated
Feb 19, 2020
Power supply
3 of 3 tasks completed
#9
· opened
Feb 05, 2020
by
Mikolaj Sowinski
Ready for schematic review (CTI internal)
design
CLOSED
7
updated
Mar 23, 2020
Slow I/O
#8
· opened
Feb 05, 2020
by
Mikolaj Sowinski
Ready for schematic review (CTI internal)
design
CLOSED
3
updated
Feb 19, 2020
VME interface
3 of 4 tasks completed
#7
· opened
Feb 05, 2020
by
Mikolaj Sowinski
Ready for schematic review (CTI internal)
design
0
updated
Mar 01, 2020
Flash memory
#6
· opened
Feb 05, 2020
by
Mikolaj Sowinski
Ready for schematic review (CTI internal)
design
CLOSED
1
updated
Mar 01, 2020
Change the DDR memory to a DDR SO-DIMM module socket (no ECC)
#5
· opened
Feb 05, 2020
by
Mikolaj Sowinski
Ready for schematic review (CTI internal)
design
CLOSED
3
updated
Feb 19, 2020
Remove the discrete DDR chips (IC28, IC4)
#4
· opened
Feb 05, 2020
by
Mikolaj Sowinski
Ready for schematic review (CTI internal)
design
CLOSED
1
updated
Feb 10, 2020
Remove J1 and J16 (stand-alone power port)
#3
· opened
Feb 05, 2020
by
Mikolaj Sowinski
Ready for schematic review (CTI internal)
design
CLOSED
3
updated
Jul 02, 2020
Use FT2232 instead of CP2103
#2
· opened
Feb 05, 2020
by
Mikolaj Sowinski
design
CLOSED
2
updated
Feb 25, 2020
Change the FPGA to XC7K160T-2FBG676
#1
· opened
Feb 05, 2020
by
Mikolaj Sowinski
Ready for schematic review (CTI internal)
design
CLOSED
1
updated
Feb 25, 2020
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