Flash memory
Add a separate flash for bitstream storage for the AFPGA connected to Xilinx’s boot SPI interface. This flash must be also connected to the SFPGA, so that the bootloader can access it.
Add a separate flash for bitstream storage for the AFPGA connected to Xilinx’s boot SPI interface. This flash must be also connected to the SFPGA, so that the bootloader can access it.