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@@ -40,7 +40,6 @@ o Programmable LED
 o FMC front panel  
 \* Internal connectors  
 o 1 JTAG header for Xilinx programming during debugging  
-o 2 SATA connectors  
 o 1 mini USB AB (USB-UART bridge)  
 \* FPGA configuration. The FPGA can optionally be programmed from:  
 o GN4124 SPRIO interface (loaded by software driver at startup)  
@@ -48,11 +47,6 @@ o JTAG header
 o SPI 32Mbit flash PROM  
 o selectable by GN4124 GPIO. Default option would be loading via the SPI
 flash PROM (stand-alone applications).  
-\* Stand-alone features  
-o External 12V power supply connector  
-o mini USB connector  
-o 4 LEDs  
-o 2 buttons  
 \* Optimised for cost
 
 ## PXIe specific features