... | ... | @@ -29,11 +29,11 @@ |
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- Clocking resources
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- 1x 10-280 MHz I2C Programmable XO Oscillator, starts up at 100
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MHz (Silicon Labs Si570, freely usable)
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- 1x 125 MHz TCXO controlled by a DAC with SPI interface, used by
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- 1x 125 MHz TCXO controlled by a DAC with SPI interface (used by
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[White Rabbit PTP
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core](https://www.ohwr.org/project/wr-cores/wikis/Wrpc-core))
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(Crystek CVPD-922 model)
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- 1x 124.992 MHz VCXO controlled by a DAC with SPI interface, used
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- 1x 124.992 MHz VCXO controlled by a DAC with SPI interface (used
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by [White Rabbit PTP
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core](https://www.ohwr.org/project/wr-cores/wikis/Wrpc-core))
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(Crystek CVPD-922 model)
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... | ... | @@ -87,7 +87,7 @@ |
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## Gained functionality
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- Larger, modern Zynq Z030 Xilinx with integrated ARM processor
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- Additional signals on FMC connector (partial HPC bank population,
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- Additional signals on FMC connector (partial HPC bank population)
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- Upgrade to Z035 and Z045 possible
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- Two or four extra GTX lines on FMC connector
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- Possibility of doubling PCIe bandwidth (2 GByte/s), but then
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... | ... | @@ -144,5 +144,5 @@ with less layers) |
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-----
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Erik van der Bij, Peter Jansweijer - 16 February 2018
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Erik van der Bij, Peter Jansweijer - 7 March 2018
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