... | ... | @@ -11,10 +11,10 @@ |
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- **XC7Z030-1FBG676C (~206 Euro)** (-1= slowest, commercial temp
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range, fast enough for most applications?)
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- 4 GTX receivers (2 used for PCIe, 1 for SFP, 1 for FMC - as
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on SPEC - and none for SATA).
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on SPEC -).
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- Possibility to mount Z035: XC7Z035-1FBG676C (~800 Euro)
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- 8 GTX receivers (2 used for PCIe, 1 for SFP, 3 for FMC, and
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2 either for a) SATA, b) 4-lane PCIe, or c) FMC)
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2 either for a) 4-lane PCIe or b) FMC)
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- FMC slot with high pin count (HPC) connector
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- Vadj fixed to 2.5V
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- Fully populated LA bank
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... | ... | @@ -29,16 +29,19 @@ |
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- Clocking resources
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- 1x 10-280 MHz I2C Programmable XO Oscillator, starts up at 100
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MHz (Silicon Labs Si570, freely usable)
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- 1x 125 MHz TCXO controlled by a DAC with SPI interface
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- 1x 124.992 MHz VCXO controlled by a DAC with SPI interface
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- 1x low-jitter frequency synthesizer (TI CDCM61004, fixed
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configuration, Fout=125 MHz, used by [White Rabbit PTP
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- 1x 125 MHz TCXO controlled by a DAC with SPI interface, used by
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[White Rabbit PTP
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core](https://www.ohwr.org/project/wr-cores/wikis/Wrpc-core))
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- 1x 124.992 MHz VCXO controlled by a DAC with SPI interface, used
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by [White Rabbit PTP
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core](https://www.ohwr.org/project/wr-cores/wikis/Wrpc-core))
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- On board memory
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- 1x 8Gbit (1 GByte) DDR3 IC
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- MicroSD slot for flash memory
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- 64K (8K x 8-bit) I2C Serial EEPROM (24AA64T-I/MC) for storing
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serial number, calibration parameters and other critical data
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- 1x SPI **xx** Mbit flash PROM for multiboot FPGA powerup
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configuration, storage of the FPGA firmware or of critical data
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configuration, storage of the FPGA firmware
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- Miscellaneous
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- On-board thermometer IC (DS18B20U+)
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- Unique 64-bit identifier (DS18B20U+)
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... | ... | @@ -51,18 +54,17 @@ |
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- FMC front panel
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- Internal connectors
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- 1x JTAG header for Xilinx programming during debugging
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- 2x 14-pin header connector
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- Default connected to buffered LVDS general purpose I/O
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- With Z035 version may be connected to GTX (in which case no
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additional 2 GTX on FMC connector)
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- 2x 14-pin header connector connected to GPIO, with ESD
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protection
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- 1x mini USB AB (USB-UART bridge)
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- Samtec Bulls-Eye connector (just a land pattern for [22 signals
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on the PCB](https://www.samtec.com/products/bara)).
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- Samtec Bulls-Eye connector ([22 signals on the
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PCB](https://www.samtec.com/products/bara), 6 cm2 land pattern,
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user mountable connector).
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- For PPS in/out, 10MHz in, tx-abscal, rx-abscal, refclock. 6
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signals to be transferred in a differential way
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- FPGA configuration. The FPGA can optionally be programmed from:
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- JTAG header
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- SPI 32Mbit flash PROM
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- SPI \*xx\*Mbit FLASH PROM
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- Stand-alone features
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- External 12V power supply connector
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- Mini USB connector
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... | ... | @@ -83,19 +85,20 @@ |
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- Additional signals on FMC connector (partial HPC bank population,
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including possibility of two or four extra GTX lines with Z035
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upgrade)
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- Possibility of double PCIe bandwidth (2 GByte/s with Z035 upgrade)
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- With Zynq Z035 upgrade possibility of doubling PCIe bandwidth (2
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GByte/s)
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- MicroSD slot for flash memory
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- SFP+ at maximum 10 Gbps, instead of SFP at max 2.5 Gbps
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- Improved oscillators for lower jitter White Rabbit
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- Prepared for absolute calibration of White Rabbit
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- Prepared for installation of a cooling fan
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## Lost functionality
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## Changed functionality
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- SATA connectors replaced by 14-pin headers. LVDS, GPIO connected,
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not to GTX anymore
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- PCB board size likely will be larger (not compatible to existing
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boxes?)
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- PCB board size likely will be larger
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- Component price likely almost doubled
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-----
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... | ... | @@ -123,7 +126,9 @@ Alternative Xilinx Zynq series with ARM processor integrated: |
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Total: *with all options, 115 Euro extra cost (Xilinx, HPC,
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oscillators), total cost price 325 Euro.* (cf. 180 SPEC). Prices without
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PCB and front-panel.
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PCB will also be more expensive (likely larger, more layers)
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PCB will also be more expensive (likely larger, more layers).
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Verify if possible to make low-cost version (cheaper oscillators, LPC
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with less layers
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-----
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... | ... | |