... | @@ -16,13 +16,15 @@ |
... | @@ -16,13 +16,15 @@ |
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for SATA)
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for SATA)
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- FMC slot with high pin count (HPC) connector
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- FMC slot with high pin count (HPC) connector
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- Vadj fixed to 2.5V
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- Vadj fixed to 2.5V
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- Fully populated HA bank
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- Fully populated LA bank
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- All 34 differential pairs connected, 1 GTP transceiver with
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- All 34 differential pairs connected, 1 GTP transceiver with
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clock, 2 clock pairs, JTAG, I2C (as on SPEC)
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clock, 2 clock pairs, JTAG, I2C (as on SPEC)
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- Partial connectivity of HPC part
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- Partial connectivity of HPC part
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- **xx** signals on HA bank
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- **xx** signals on HA bank
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- HA\_01\_CC and HA\_02\_CC connected to GTX only when Xilinx
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- DP1\_M2C/C2M and DP2\_M2C/2CM connected to two GTX
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Z035 mounted
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transceivers only when Xilinx Z035 mounted
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- Check if possible to make compatible to
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[VFC-HD](https://www.ohwr.org/project/vfc-hd/wikis/Description)
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- Clocking resources
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- Clocking resources
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- 1x 10-280 MHz I2C Programmable XO Oscillator, starts up at 100
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- 1x 10-280 MHz I2C Programmable XO Oscillator, starts up at 100
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MHz (Silicon Labs Si570, freely usable)
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MHz (Silicon Labs Si570, freely usable)
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... | @@ -44,13 +46,13 @@ |
... | @@ -44,13 +46,13 @@ |
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- 1x Small Formfactor Pluggable (SFP) cage for fibre-optic
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- 1x Small Formfactor Pluggable (SFP) cage for fibre-optic
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transceiver
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transceiver
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([WhiteRabbit](https://www.ohwr.org/project/white-rabbit)
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([WhiteRabbit](https://www.ohwr.org/project/white-rabbit)
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support). 1.25 and 2.5 Gbps.
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support). 1.25 and 2.5 Gbps. **10 Gbps?**
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- Programmable Red and Green LEDs
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- Programmable Red and Green LEDs
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- FMC front panel
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- FMC front panel
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- Internal connectors
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- Internal connectors
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- 1x JTAG header for Xilinx programming during debugging
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- 1x JTAG header for Xilinx programming during debugging
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- 2x SATA connector
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- 2x SATA connector
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- Default connected to general purpose I/O
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- Default connected to buffered LVDS general purpose I/O
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- With Z035 version may be connected to GTX (in which case no
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- With Z035 version may be connected to GTX (in which case no
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additional 2 GTX on FMC connector)
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additional 2 GTX on FMC connector)
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- 1x mini USB AB (USB-UART bridge)
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- 1x mini USB AB (USB-UART bridge)
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... | @@ -74,6 +76,15 @@ |
... | @@ -74,6 +76,15 @@ |
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-----
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-----
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# Functional differences with SPEC
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- SATA connectors are not connected to GTX lines on default Z030
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Xilinx but to buffered LVDS.
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- With Z035 SATA possibility to order connection to GTX (default
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buffered LVDS).
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-----
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# Cost of Alternatives
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# Cost of Alternatives
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*Existing SPEC: 180 Euro component cost* (without PCB and front-panel)
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*Existing SPEC: 180 Euro component cost* (without PCB and front-panel)
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... | | ... | |