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@@ -46,10 +46,9 @@ board*](https://www.ohwr.org/project/spec/wiki) (shown)**
       - ***Under discussion. Possibly only GTX lines connected and Vadj
         fixed at 2.5V (23/10/18)***
       - Vadj programmable at 1.8V and 2.5V.
-          - \_\*Not possible due to LVDS level restrictions on the
+          - \*Not possible due to LVDS level restrictions on the
             7-series io banks, as can be read on page 91 of the
-            [manual](https://www.xilinx.com/support/documentation/user_guides/ug471_7Series_SelectIO.pdf#page=91/.*)_
-            
+            [manual](https://www.xilinx.com/support/documentation/user_guides/ug471_7Series_SelectIO.pdf#page=91/.)*
           - 2.5V can only be used with a LPC FMC mezzanine: only the LPC
             pins (LA bank) are 2.5V tolerant.
       - Fully populated LA bank