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@@ -87,8 +87,8 @@ board*](https://www.ohwr.org/project/spec/wiki) (shown)**
             interface, while the FGPA can only handle 32-bits and1 GByte
             max)</s>
       - 1x 8 Gbit (1 GByte) DDR3 <s>IC</s> connected to the programmable logic **(32 bit wide)**
-          - <s>for bandwidth reasons
-          - possibly a second 8 Gbit DDR3 IC to prevent the DDR3 problem
+          - <s>for bandwidth reasons</s>
+          - <s>possibly a second 8 Gbit DDR3 IC to prevent the DDR3 problem
             of the latency and turnaround from READ to WRITE – two banks
             solve the problem. </s>
       - 1x **Q**SPI **256** Mbit flash PROM for multiboot FPGA powerup
@@ -115,8 +115,8 @@ board*](https://www.ohwr.org/project/spec/wiki) (shown)**
       - 1x <s>USB-C</s>**mini USB Type B** connector
           - Can serve two UARTs over the same single mini-USB connector
             with CP2105 - Dual UART bridge IC
-              - One to UART interface of the ARM, one to user logic
-                (e.g., PTP core)
+              - One to UART interface of the ARM
+              - One to user logic (e.g., PTP core)
       - 1x <s>USB-C</s> **USB Type A** connector connected to USB **2.0** port of the ARM
       - Samtec Bulls-Eye connector ([BDRA: 20 signals on the PCB](https://www.samtec.com/products/bdra), **1.3 x 5.0 = 6.5 cm2** land pattern, user mountable connector) **or** ([BARA: 22 signals on the PCB](https://www.samtec.com/products/bara), **1.8 x 2.1 = 4 cm2 land pattern, user mountable connector); BDRA probably better supported but slightly bigger, final choise BDRA/BARA will depend on PCB layout**
           - ESD protection on all signals
@@ -134,16 +134,18 @@ board*](https://www.ohwr.org/project/spec/wiki) (shown)**
       - **Q**SPI **256** Mbit FLASH PROM
       - User FPGA logic: via PCIe or ARM (i.e. using <s>[Internal Configuration Access Port:
         ICAPE2](https://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf)</s>
-        [PS PCAP / ICA](see chapter 6.1.8 https://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf))
+        **[PS PCAP / ICA](see chapter 6.1.8 https://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf))**
   - Stand-alone features
       - External 12V **150W-ATX** power supply connector
       - **USB Type A** connector
       - <s>USB-C</s>**mini USB Type B** connector
-      - **10/100/1000 Mbps** Ethernet
-      - <s>4</s>**6**x LEDs **(2x front pannel, 4x on PCB)**
-      - <s>2</s>**4**x buttons
+      - **10/100/1000 Mbps copper** Ethernet **RJ45**
+      - **SFP+ cage for fibre-optic transceiver([WhiteRabbit](https://www.ohwr.org/project/white-rabbit) support)**
+      - <s>4</s>**7**x LEDs **(2x front pannel, 4x on PCB, 1x PCI SMB-bus)**
+      - <s>2</s>**5**x buttons
           - 1 **PS_POR** connected to reset controller
           - **1 PS_SRTS_B**
+          - **1 PL system reset**
           - 1 general purpose
           - **1 PROGram button for FPGA**
   - Power consumption: <s>5-12</s>**10-35** Watt, depending on application