| ... | ... | @@ -87,8 +87,8 @@ board*](https://www.ohwr.org/project/spec/wiki) (shown)** |
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interface, while the FGPA can only handle 32-bits and1 GByte
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max)</s>
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- 1x 8 Gbit (1 GByte) DDR3 <s>IC</s> connected to the programmable logic **(32 bit wide)**
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- <s>for bandwidth reasons
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- possibly a second 8 Gbit DDR3 IC to prevent the DDR3 problem
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- <s>for bandwidth reasons</s>
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- <s>possibly a second 8 Gbit DDR3 IC to prevent the DDR3 problem
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of the latency and turnaround from READ to WRITE – two banks
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solve the problem. </s>
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- 1x **Q**SPI **256** Mbit flash PROM for multiboot FPGA powerup
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| ... | ... | @@ -115,10 +115,10 @@ board*](https://www.ohwr.org/project/spec/wiki) (shown)** |
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- 1x <s>USB-C</s>**mini USB Type B** connector
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- Can serve two UARTs over the same single mini-USB connector
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with CP2105 - Dual UART bridge IC
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- One to UART interface of the ARM, one to user logic
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(e.g., PTP core)
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- One to UART interface of the ARM
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- One to user logic (e.g., PTP core)
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- 1x <s>USB-C</s> **USB Type A** connector connected to USB **2.0** port of the ARM
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- Samtec Bulls-Eye connector ([BDRA: 20 signals on the PCB](https://www.samtec.com/products/bdra), **1.3 x 5.0 = 6.5 cm2** land pattern, user mountable connector) ** or ** ([BARA: 22 signals on the PCB](https://www.samtec.com/products/bara), **1.8 x 2.1 = 4 cm2 land pattern, user mountable connector); BDRA probably better supported but slightly bigger, final choise BDRA/BARA will depend on PCB layout**
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- Samtec Bulls-Eye connector ([BDRA: 20 signals on the PCB](https://www.samtec.com/products/bdra), **1.3 x 5.0 = 6.5 cm2** land pattern, user mountable connector) **or** ([BARA: 22 signals on the PCB](https://www.samtec.com/products/bara), **1.8 x 2.1 = 4 cm2 land pattern, user mountable connector); BDRA probably better supported but slightly bigger, final choise BDRA/BARA will depend on PCB layout**
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- ESD protection on all signals
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- **10 differential signals:**
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- **125 MHz reference clock in/out**
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| ... | ... | @@ -134,16 +134,18 @@ board*](https://www.ohwr.org/project/spec/wiki) (shown)** |
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- **Q**SPI **256** Mbit FLASH PROM
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- User FPGA logic: via PCIe or ARM (i.e. using <s>[Internal Configuration Access Port:
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ICAPE2](https://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf)</s>
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[PS PCAP / ICA](see chapter 6.1.8 https://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf))
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**[PS PCAP / ICA](see chapter 6.1.8 https://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf))**
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- Stand-alone features
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- External 12V **150W-ATX** power supply connector
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- **USB Type A** connector
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- <s>USB-C</s>**mini USB Type B** connector
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- **10/100/1000 Mbps** Ethernet
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- <s>4</s>**6**x LEDs **(2x front pannel, 4x on PCB)**
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- <s>2</s>**4**x buttons
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- **10/100/1000 Mbps copper** Ethernet **RJ45**
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- **SFP+ cage for fibre-optic transceiver([WhiteRabbit](https://www.ohwr.org/project/white-rabbit) support)**
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- <s>4</s>**7**x LEDs **(2x front pannel, 4x on PCB, 1x PCI SMB-bus)**
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- <s>2</s>**5**x buttons
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- 1 **PS_POR** connected to reset controller
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- **1 PS_SRTS_B**
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- **1 PL system reset**
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- 1 general purpose
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- **1 PROGram button for FPGA**
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- Power consumption: <s>5-12</s>**10-35** Watt, depending on application
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| ... | ... | |
