Home.md

@@ -20,67 +20,10 @@ Projects](https://www.ohwr.org/project/fmc-projects).
 
 ## Main Features - *Under discussion*
 
-  - [Specification gathering discussion](specgather)
-  - [Feature Alternatives](FeatureAlternatives) 
-
-<!-- end list -->
-
-  - Optimised for performance or cost?
-      - High-pin count FMC, better oscillators, lower jitter, more PCB
-        layers, larger FPGA than those on SPEC?
-      - *SPEC was optimised for simplicity and cost*
-      - *If go for performance, the expected cost will be twice or three
-        times of SPEC*
-  - 4-lane PCIe
-  - 1x Xilinx handling PCIe interface and user gateware
-      - Xilinx Kintex-7: XC7K160T in FBG676 package (XC7K160T-2FBG676C)
-  - FMC slot with high pin count (HPC) connector
-      - Not full HPC connectivity (not all high-speed serial lines)
-      - Vadj adjustable **
-      - Dedicated clock signals from Carrier to FMC (available on HPC
-        pins) ?
-  - Clocking resources
-      - 1x 10-280 MHz I2C Programmable XO Oscillator, starts up at 100
-        MHz (Silicon Labs Si570, freely usable)
-      - 1x 25 MHz TCXO with adjustable frequency (<s>AD5662</s>, used by
-        [White Rabbit PTP
-        core](https://www.ohwr.org/project/wr-cores/wikis/Wrpc-core))
-      - 1x 20 MHz VCXO with adjustable frequency (<s>AD5662</s>, used by
-        [White Rabbit PTP
-        core](https://www.ohwr.org/project/wr-cores/wikis/Wrpc-core))
-      - 1x low-jitter frequency synthesizer (<s>TI CDCM61004</s>, fixed
-        configuration, Fout=125 MHz, used by [White Rabbit PTP
-        core](https://www.ohwr.org/project/wr-cores/wikis/Wrpc-core))
-  - On board memory
-      - 1x 2Gbit (256 MByte) DDR3 (?)
-      - 1x SPI flash PROM for multiboot FPGA powerup configuration,
-        storage of the FPGA firmware or of critical data
-  - Miscellaneous
-      - on-board thermometer IC (DS18B20U+)
-      - unique 64-bit identifier (DS18B20U+)
-  - Front panel containing
-      - 1x Small Formfactor Pluggable (SFP) cage for fibre-optic
-        transceiver
-        ([WhiteRabbit](https://www.ohwr.org/project/white-rabbit)
-        support). 1.25 and 2.5 Gbps. 
-      - Programmable Red and Green LEDs
-      - FMC front panel
-  - Internal connectors
-      - 1x JTAG header for Xilinx programming during debugging
-      - 2x SATA connector 
-      - 1x mini USB AB (USB-UART bridge)
-      - 1x connector for optional cooling fan
-  - FPGA configuration. The FPGA can optionally be programmed from:
-      - JTAG header
-      - SPI Flash PROM
-      - Partial reprogramming via PCIe
-  - Stand-alone features
-      - External 12V power supply connector
-      - mini USB connector
-      - 4 LEDs
-      - 2 buttons
-  - Power consumption: 5-12 Watt, depending on application
-  - Optional cooling [fan](Fan-Design) for the mezzanine.
+  - [Specification gathering discussion](specgather) - a list of wish
+    items
+  - [Feature Alternatives](FeatureAlternatives) - boiling down to a few
+    alternatives
 
 -----
 
@@ -122,10 +65,14 @@ Projects](https://www.ohwr.org/project/fmc-projects).
 <td>12-01-2018</td>
 <td>Main specifications collected. [Discussion points documented](/specgather).</td>
 </tr>
+<tr class="even">
+<td>29-01-2018</td>
+<td>Specifications taking shape: <a href="specgather">Specification gathering discussion</a> - a list of wish items &amp; <a href="FeatureAlternatives">Feature Alternatives</a> - boiling down to a few alternatives</td>
+</tr>
 </tbody>
 </table>
 
 -----
 
-22 January 2018
+29 January 2018