Use the 'Convention' on the golden (WIP).

951d9ba5 · Tristan Gingold · a465c3cc · 951d9ba5 · 951d9ba5 · 951d9ba5
Commit 951d9ba5 authored Jun 17, 2019 by Tristan Gingold
5 changed files
--- a/hdl/golden/top/Manifest.py
+++ b/hdl/golden/top/Manifest.py
-files = ["spec_init.vhd", "spec_init.ucf"]
+files = ["spec_init.vhd", "spec_devices.vhd", "spec_init.ucf"]
--- a/hdl/golden/top/spec_devices.cheby
+++ b/hdl/golden/top/spec_devices.cheby
+memory-map:
+  name: golden_devices
+  bus: wb-32-be
+  size: 0x400
+  children:
+    - submap:
+       name: metadata
+       description: a ROM containing the carrier metadata
+       size: 0x40
+       interface: sram
+    - reg:
+       address: 0x40
+       name: app_offset
+       description: offset to the application metadata
+       access: ro
+       width: 32
+    - submap:
+        name: therm_id
+        description: Thermometer and unique id
+        size: 0x10
+        interface: wb-32-be
+        x-hdl:
+          busgroup: True
+    - block:
+       name: csr
+       description: carrier and fmc status and control
+       children:
+       - reg:
+          name: resets
+          description: global and application resets
+          access: rw
+          width: 32
+          children:
+           - field:
+              name: global
+              range: 0
+           - field:
+              name: appl
+              range: 1
+       - reg:
+          name: fmc_presence
+          description: presence lines for the fmcs
+          access: ro
+          width: 32
+    - submap:
+        name: fmc_i2c
+        description: i2c controllers to the fmcs
+        address: 0x80
+        size: 0x20
+        interface: wb-32-be
+        x-hdl:
+          busgroup: True
+    - submap:
+        name: flash_spi
+        description: spi controller to the flash
+        address: 0xa0
+        size: 0x20
+        interface: wb-32-be
+        x-hdl:
+          busgroup: True
+    - submap:
+        name: dma
+        description: dma registers for the gennum core
+        address: 0xc0
+        size: 0x40
+        interface: wb-32-be
+        x-hdl:
+          busgroup: True
+    - submap:
+        name: vic
+        description: vector interrupt controller
+        size: 0x100
+        interface: wb-32-be
+        x-hdl:
+          busgroup: True
+    - submap:
+        name: wrc
+        description: white-rabbit core
+        size: 0x100
+        interface: wb-32-be
+        x-hdl:
+          busgroup: True
+    - submap:
+        name: app
+        description: the application
+        size: 0x100
+        interface: wb-32-be
+        x-hdl:
+          busgroup: True
--- a/hdl/golden/top/spec_devices.vhd
+++ b/hdl/golden/top/spec_devices.vhd
--- a/hdl/golden/top/spec_init.ucf
+++ b/hdl/golden/top/spec_init.ucf
@@ -21,24 +21,19 @@ NET "SFP_TX_DISABLE_o" IOSTANDARD = "LVCMOS25";
 NET "SFP_LOS_i" LOC = D18;
 NET "SFP_LOS_i" IOSTANDARD = "LVCMOS25";

-NET "FPGA_SCL_B" LOC = F7;
-NET "FPGA_SCL_B" IOSTANDARD = "LVCMOS25";
-NET "FPGA_SDA_B" LOC = F8;
-NET "FPGA_SDA_B" IOSTANDARD = "LVCMOS25";
-
-NET "BUTTON1_I" LOC = C22;
-NET "BUTTON1_I" IOSTANDARD = "LVCMOS18";
-NET "BUTTON2_I" LOC = D21;
-NET "BUTTON2_I" IOSTANDARD = "LVCMOS18";
-
-NET "SPI_NCS_O"  LOC = AA3;
-NET "SPI_NCS_O"  IOSTANDARD = "LVCMOS25";
-NET "SPI_SCLK_O" LOC = Y20;
-NET "SPI_SCLK_O"  IOSTANDARD = "LVCMOS25";
-NET "SPI_MOSI_O" LOC = AB20;
-NET "SPI_MOSI_O"  IOSTANDARD = "LVCMOS25";
-NET "SPI_MISO_I" LOC = AA20;
-NET "SPI_MISO_I"  IOSTANDARD = "LVCMOS25";
+#NET "BUTTON1_I" LOC = C22;
+#NET "BUTTON1_I" IOSTANDARD = "LVCMOS18";
+#NET "BUTTON2_I" LOC = D21;
+#NET "BUTTON2_I" IOSTANDARD = "LVCMOS18";
+
+#NET "SPI_NCS_O"  LOC = AA3;
+#NET "SPI_NCS_O"  IOSTANDARD = "LVCMOS25";
+#NET "SPI_SCLK_O" LOC = Y20;
+#NET "SPI_SCLK_O"  IOSTANDARD = "LVCMOS25";
+#NET "SPI_MOSI_O" LOC = AB20;
+#NET "SPI_MOSI_O"  IOSTANDARD = "LVCMOS25";
+#NET "SPI_MISO_I" LOC = AA20;
+#NET "SPI_MISO_I"  IOSTANDARD = "LVCMOS25";

 NET "L_RST_N" LOC = N20;
 NET "L_RST_N" IOSTANDARD = "LVCMOS18";
@@ -167,20 +162,31 @@ NET "P2L_DATA[14]" IOSTANDARD = "SSTL18_I";
 NET "P2L_DATA[15]" LOC = H19;
 NET "P2L_DATA[15]" IOSTANDARD = "SSTL18_I";

-NET "GPIO[1]" LOC = U16;
-NET "GPIO[1]" IOSTANDARD = "LVCMOS25";
-NET "GPIO[0]" LOC = AB19;
+# GPIO 8 and 9 of the Genum
+NET "GPIO[0]" LOC = U16;
 NET "GPIO[0]" IOSTANDARD = "LVCMOS25";
+NET "GPIO[1]" LOC = AB19;
+NET "GPIO[1]" IOSTANDARD = "LVCMOS25";

-NET "LED_RED" LOC = D5;
-NET "LED_RED" IOSTANDARD = "LVCMOS25";
-NET "LED_GREEN" LOC = E5;
-NET "LED_GREEN" IOSTANDARD = "LVCMOS25";
+#NET "LED_RED" LOC = D5;
+#NET "LED_RED" IOSTANDARD = "LVCMOS25";
+#NET "LED_GREEN" LOC = E5;
+#NET "LED_GREEN" IOSTANDARD = "LVCMOS25";

 NET "P2L_CLKp" TNM_NET = "p2l_clkp_grp";
 NET "P2L_CLKn" TNM_NET = "p2l_clkn_grp";
 TIMESPEC TS_cmp_gn4124_core_cmp_clk_in_P_clk = PERIOD "cmp_gn4124_core/cmp_clk_in/P_clk" 5 ns HIGH 50%;

+#----------------------------------------
+# FMC slot management
+#----------------------------------------
+NET "fmc0_prsnt_m2c_n_i" LOC = AB14;
+NET "fmc0_scl_b"         LOC = F7;
+NET "fmc0_sda_b"         LOC = F8;
+
+NET "fmc0_prsnt_m2c_n_i" IOSTANDARD = "LVCMOS25";
+NET "fmc0_scl_b"         IOSTANDARD = "LVCMOS25";
+NET "fmc0_sda_b"         IOSTANDARD = "LVCMOS25";

 #---------------------------------------------------------------------------------------------
 # False Path

--- a/hdl/golden/top/spec_init.vhd
+++ b/hdl/golden/top/spec_init.vhd