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Simple PCIe FMC carrier SPEC
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Simple PCIe FMC carrier SPEC
Commits
90be31a5
Commit
90be31a5
authored
Jun 15, 2020
by
Evangelia Gousiou
Committed by
Dimitris Lampridis
Jul 24, 2020
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syn: constraints path correction
parent
025c2a5d
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spec_base_ddr3.ucf
hdl/syn/common/spec_base_ddr3.ucf
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hdl/syn/common/spec_base_ddr3.ucf
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90be31a5
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@@ -114,7 +114,7 @@ NET "inst_spec_base/*cmp_ddr_ctrl_bank3/*/memc3_mcb_raw_wrapper_inst/ioi_drp_clk
# DMA
#---------------------------------------
NET "inst_spec_base/cmp_gn4124_core/cmp_wrapped_gn4124/gen_with_dma.cmp_dma_controller/dma_async_*" TNM = FFS "dma_ffs";
NET "inst_spec_base/
gen_with_gennum.
cmp_gn4124_core/cmp_wrapped_gn4124/gen_with_dma.cmp_dma_controller/dma_async_*" TNM = FFS "dma_ffs";
TIMESPEC TS_dma_async_ffs = FROM dma_ffs TO pci_clk 15ns DATAPATHONLY;
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